查询词典 gate channel

The 20S catalytic core of the 26S proteasome has the shape of a barrel made of four rings which are composed of seven differentαsubunitsα_1-α_7 at two outer rings and seven differentβsubunitsβ_1-β_7 at two inner rings at which the catalytic sites locate. Three of theβsubunits contain proteolyses sites, which are sequestered in the hollow interior of the 20S particle. Substrates enter the 20S through a narrow channel formed by theβsubunits, whose N-termini, depending on their conformation, can either obstruct or allow substrate entry and thus function as a gate. This entry channel is narrow and only permits passage of unfolded, linearized polypeptides.

哺乳动物26S蛋白酶体是由一个20S催化颗粒(catalytic particle，CP)和两个19S调节颗粒(regulatory particle，RP)组成的ATP(adenosine-triphosphate，ATP)依赖性蛋白水解酶复合体。20S CP是26S蛋白酶体的催化核心，它是由4个圆环堆叠形成的桶状复合物，其中两侧外环每个环是由α_1-α_7亚基组成，两个内环每个环是由β_1-β_7亚基组成，4个环的中央形成一个狭窄的内腔。2个β内环形成了20S CP的催化中心空腔，其内壁为催化活性位点所在地；外侧α环中心的孔道是底物到达催化中心空腔的通道，一般被α亚基上的N末端所封闭，阻止胞内非目的靶蛋白进入20S CP内被降解破坏。

7 To 3.3 V operating supply voltage 44.1 kHz sampling frequency 16.9344 MHz (384fs) system clock Built-in crystal oscillator circuit 16-bit, MSB rst, rear-packed serial data input format ( 64 fs bit clock) 8-times oversampling digital lter · 32 dB stopband attenuation ·+0.05 to -0.05 dB passband ripple Deemphasis lter operation · 36 dB stopband attenuation ·-0.09 to +0.23 dB deviation from ideal deem- phasis lter characteristics Attenuator · 7-bit attenuator (128 steps) set by microcontrol- ler Soft mute function set by parallel setting ·(approximately 1024/fs total muting time) Mono setting · Left or right channel mono selectable by micro- controller Built-in innity-zero detection circuit , two-channel D/A converter · 3rd-order noise shaper · 32fs oversampling Built-in 3rd-order post-converter low-pass lters 24-pin VSOP package Molybdenum-gate CMOS process

2.7至3.3 V工作电源电压为44.1千赫的采样频率16.9344兆赫（384fs）系统时钟内置晶体振荡器电路的16位，MSB在前，后包装的串行数据输入格式（64飞秒位时钟）8倍超采样数字滤波器·32分贝的阻带衰减·+0.05至-0.05分贝通带纹波去加重滤波器的运作·36 dB抑制频宽衰减·-0.09到0.23 dB的偏差认为不理想，症状困扰评估滤波特性衰减器·7位衰减器（128级）集由单片机在-莱尔软静音功能的平行设置·（共约1024/fs静音时间）单声道设置·左或右声道单声道微控制器可选的内置的无限零检测电路Δ，两通道的D / A转换器·第三阶噪声整形·32fs过采样内置三阶后转换器的低通滤波器24引脚VSOP封装钼栅CMOS工艺

The effective channel mobility of4H-SiC MOSFETs is increased significantly by high temperature anneals in nitric oxide.4H-SiC MOSFET with hydrogen postoxidation annealing has a lower threshold voltage of3.1V and a wide gate voltage operation range in which the inversion channel mobility is more than100cm 2 /Vs.

SiC的雪崩击穿电场是Si的十倍，因此，理论上SiC单极功率器件的导通电阻可以比Si器件的低400倍，但在6H-SiCMOS结构中，由于反型层的电子迁移率较小，沟道迁移率测量值仅为40～50cm2/Vs，远远低于6H-SiC的体迁移率400cm2/Vs眼1熏2演，限制了SiC功率MOSFET的导通电阻Ron。

The non-uniform channel impurity, the non-equal surface potential for the changing of balance energy band and the gate capacitor by the edge effect is thought about; the mathematics expression of the deep sub-micron non-uniform channel DMOS threshold voltage model is obtained.

计及沟道区杂质的二维非均匀分布、平衡态能级对沟道各点表面势的影响和栅电容的边缘效应，给出深亚微米DMOS的阈值电压二维解析式。

An accumulation channel trench gate insulated gate bipolar transistor is proposed.

提出了一种具有积累层沟道的槽栅IGBT结构。

Gate recess is widely used in III-V compound transistors to modify the threshold voltage and optimize the device performance through adjusting the gate to channel distance.

闸极掘入是改变闸极与电流通道的距离而使截止电压改变，进而使电晶体的表现最佳化，闸极掘入的技术已经广泛的应用在三五族半导体里。

It also demonstrated that degradation slope of Vth will become lower and reach a constant quantity. Higher Temperature and gate voltage enhanced the V〓, shift of PMOSFET. With the gate oxide growing thinner and channel length growing more lessen, the influence of NBTI effects will become more and more severity.

应力温度的升高以及负栅压应力的增大都会使器件的V〓漂移增强，而且随着器件栅长L的减小，栅氧厚度T〓减薄等使PMOSFET中的NBTI效应呈现出了增强的趋势，这使得NBTI退化有可能成为未来CMOS器件发展的严重障碍。

These improvements are attributed to the Schottky barrier height increase and the decrease of the gate to channel distance as Pt sink into the InGaP Schottky layer during gate sinking process.

这些特性上的改善源自於Schottky barrier height的增高；在退火后，因为铂扩散下沈的制程，使得闸极至通道的距离减低。

See also Nozaki et al.,"A 1-Mb EEPROM with MONOS Memory Cell for Semiconductor Disk Application," IEEE Journal of Solid-State Circuits, Vol. 26, No. 4, April 1991, pp. 497-501, which describes a similar element in a split-gate configuration where a doped polysilicon gate extends over a portion of the memory element channel to form a separate select transistor.

还参见Nozaki等人的&A1-Mb EEPROM with MONOS Memory Cell for Semiconductor Disk Application&(IEEE Journal of Solid-State Circuits，第26卷，第4期，1991年4月，497-501页)，其描述了处于分裂栅极配置中的类似元件，其中掺杂的多晶硅栅极在存储器元件沟道的一部分上延伸以形成单独的选择晶体管。

North of the city because no mountains, there areweng cheng things "S"-shaped channel, from West to East by the South Gate of buildings which have outer profile, outside the South Gate and outside the city.

城北因依山而无门，东西瓮城内有&S&形通道，从西城经南门至东城筑有外廓，南门外并有外城。

Neither the killing of Mr Zarqawi nor any breakthrough on the political front will stop the insurgency and the fratricidal murders in their tracks.

在对危险的南部地区访问时，他斥责什叶派民兵领导人对中央集权的挑衅行为。

In fact,I've got him on the satellite mobile right now.

实际上 我们已接通卫星可视电话了