查询词典 full adder

Modelsim的同行-Modelsim the procedures for the development of a platform for the development of VHDL language, achieving a simple full adder...

本程序以Modelsim为开发平台，采用VHDL为开发语言，实现了简单的全加器。

It is based on an one column full adder in function; there introduces the special carry chain in the parallel and the vertical directions in order to accord the flexible carry needed by the data channel, it can be confected into different working mode, and realizes the compound logic and the sequence logic.

它在功能上基于一位全加器；在水平和垂直方向中都加入了专用进位链以满足数据通路所需的灵活进位，可配制为不同的工作模式，分别实现组合逻辑和时序逻辑。

This is my ISP programming in an independent experiment using a structured, prepared as described in a seven-member voting machine, through a unique 3 times a full adder mapping method in order to achieve a vote of seven functions, with the network on any other A seven-member voting machine source code must not identical.

详细说明：这是我在ISP编程实验中独立编写的采用结构化描述的一个七人表决器，通过独特的3次映射一位全加器的方法从而实现七人表决器的功能，与网络上任何其他的七人表决器源码决无雷同。

Using the proposed method, some neuron MOS circuits realizing two-variable common functions and a full adder are designed, and the ratio of the coupling capacitance in each circuit can be calculated conveniently.

在此基础上设计了实现常用二变量逻辑函数的神经元MOS电路和全加器等电路。

Based on the transition propagation analysis of the basic unit of full adder, a kind of single input change BIST sequences is generated which has been designated to be more effective than multiple input change sequences when highly robust delay fault coverage is targeted in a series of previous theoretical and experimental results.

已有的理论和实践表明采用单跳变测试序列比多跳变序列具有更高的测试鲁棒性。

Programmable logic gate, I-bit nanopipeline full adder and 4×4 nanopipeline array multiplier based on RTD-CMOS circuits are presented in this paper.

文中对数字电路中比较典型的可编程逻辑门、全加器电路进行了设计与模拟，并在此基础上对4×4阵列纳米流水线乘法器进行了结构设计。

When the cell is configured for XOR XNOR MUX scheme,it can achieve the functions such as one bit full adder and base multiplier cell and so on for datapath application.

该单元采用功能增强的MUX结构，在配置为异或同或多路选择器结构时，只用一个单元的开销就可实现一位全加器、基本乘法单元等适于数据通路应用的功能。

Based on a new modified Wallace multiplier structure, named bi-forked Wallace multiplier structure, this paper presents the design of a highly re-configurable Multiplier for VLIW multimedia-processor. We found a reusable design method to extend multiplier with full adder array. The Structure can enable 32/16/8 bit operands, and has been optimized for speed and area.

在VLIW多媒体芯片的设计过程中，针对传统乘法器与加法器的不足，提出了一种新的分叉华莱氏树结构的乘法器模型，采用可重用的模块化设计思想，通过重用一位全加器阵列对乘法器进行扩展，处理器可以在一个乘法器单元内部同时支持多个32/16/8位的乘法运算，同时使乘法单元的速度和面积均得以优化。

As an example, in the design of a 4-bit ripple carry adder, the second and fourth full adders do not use output inverters for carry generation. one inverter delay is eliminated for every two full adders in the adder chain, and four transistors are reduced. Similarly, in complex designs like the multiplier, the output inverters for generating sum and carry can be used in alternative stages, thereby improving speed and reducing area.

例如，在4位行波进位加法器中，第2级和第4级的加法器不需要用输出反向器进行进位产生，因此，加法器链上的反向器延迟每两级全加器抵消一次，因此可以减少4个晶体管，类似的，在乘法器这样的复杂设计中，用于产生"和"以及"进位"的输出反向器可以用于其它方面，因此可以改善电路的速度和减小面积。

In part one (chapter 2-3), two new methods and systems of optical parallel logic operation are studied. Triple-in Double-out shadow-casting logic operation system is proposed and realized for the first time. Based on this, optical full adder and 3-bit decoder array logic have been obtained. It is the first time to use coding pattern and different reading-writing model to realize BSO-PROM optical parallel logic operation where the time-order operation is avoided, so that the computing speed of optical parallel logic gate which uses this kind of spatial light modulator is increased, and it is successfully used in optical symbolic substitution .

在第一部分，对两种新的并行光学布尔逻辑运算方法及系统进行了研究：首次提出并实现了三输入、双输出铸影光学逻辑运算系统及其由此得到的光学全加器，并提出一种以此为基础的3-比特译码器阵列逻辑，首次利用图形编码和不同的读写模式实现了无时序操作的BSO-PROM光并行逻辑运算，大大提高了这种空间光调制器用作光并行逻辑门的运算速度，使之成功地用于光学符号代换之中。

In the negative and interrogative forms, of course, this is identical to the non-emphatic forms.

。但是，在否定句或疑问句里，这种带有"do"的方法表达的效果却没有什么强调的意思。

Go down on one's knees;kneel down

屈膝跪下。。。下跪祈祷