查询词典 full adder

A VHDL prepared by the full adder, digital circuit design of an EDA example, may not be special, but should be able to use what they are doing.

一个用VHDL语言编写的全加器，是数字电路EDA设计的一个例子，可能不太特别，但是应该可以用一下的。

This is a use of embedded hardware-based high-level language to describe the All-Canadian program to meet the functions of the binary full adder.

详细说明：这是一个基于嵌入式的利用硬件高级描述语言编写的全加器程序，可以满足二进制全加的功能。

A VHDL prepared by the full adder, digital circuit design of an EDA example, may not be special, but should be able to use...

一个用VHDL语言编写的全加器，是数字电路EDA设计的一个例子，可能不太特别，但是应该可以用一下的。

At last, the Logistic mapping is taken as an example to show how to implement a full adder by using one chaotic unit.

最后，以Logistic映射为例给出了使用一个混沌单元实现全加器的方法。

VHDL graphics files to achieve four full adder, in the hope that useful!

详细说明： VHDL图形文件实现的4位全加器，希望对大家有用！

The design is a parallel 32-bit full adder, and floating-point operations can be achieved!

详细说明：本设计是用32位的并行全加器的，可以实现浮点运算！

Four full adder original code, including the simulation code and four counter code.

4位全加器原码，包括仿真码和4位计数器码。

Optical logic gates and full adder are essential elements performing logic and arithmetic operations in optical digital computing systems.

光学逻辑门与全加器是数字光计算系统进行逻辑操作及算术运算的基本元件。

Based on the I-V characteristics of single-electron transistor and the concepts of CMOS digital integrated circuit design, a full adder which consists of 28 complementary SETs is proposed.

基于单电子晶体管的IV特性和CMOS数字电路的设计思想，提出了一种由28个互补型SET构成的全加器电路结构。

For the partial products generation, the novel method of Booth encoding combined with partial products generating is put up, which can directly map the multiplicand and multiplicator to partition products without generating the BOOTH encoding results. For the optimization of Wallace tree adding, the series formulas of full-adder and 4-2 Compressor realization are introduced to guidance the selection. For the non-bias round, forwarding round disposal in Wallace tree method is brought forward to avoid the final multi-bit adder. Also, the idea of delay-oriented partition of the MAC frame is put up to achieve the perfect match with multi-pipeline DSP architecture.

提出了一种构建多模式算法最小并集的MAC通用结构思想与一种划分MAC通用结构以适应多流水级DSP处理器设计的通用MAC设计方法；对于BOOTH编码和部分积产生，提出了直接建立被乘数与部分积的多路选择映射关系的BOOTH编码和部分积联合产生方法；对于最优Wallace树型加法实现，提出了全加器和4-2 compressor电路实现Wallace树加法所需的关键加法路径级数公式以指导实现选择；对于无偏舍入处理，提出了在Wallace树处理舍入问题的舍入运算前置方法；提出了以时延为导向的MAC各部分单元组合与流水线匹配具体方法。

In the negative and interrogative forms, of course, this is identical to the non-emphatic forms.

。但是，在否定句或疑问句里，这种带有"do"的方法表达的效果却没有什么强调的意思。

Go down on one's knees;kneel down

屈膝跪下。。。下跪祈祷