查询词典 divider

THERE should be bedspreads that have a soft divider sewn down the middle, that demarks the middle of bed.

这种床单从中间一直缝了柔软的分隔层来区分床的一半。

This series of products with unique designs, such as: local oscillator frequency multiplier / divider, two low-noise amplifier gain settings, can effectively extend the standby time of low current call mode.

该系列产品采用独特的设计，如：本振倍频器/分频器、两种低噪声放大器增益设置、可有效延长手机待机时间的低电流呼叫模式。

The main products TQSW no local place-frequency electrical impulse voltage testing transformer test sets of series resonant frequency generator unit test transformer dry-type high-voltage testing transformer the ball-gap discharge frequency divider DC High-frequency DC generator, generator, inverter-current multi-function grounding impedance test system-current generator (up-flow device) performance of an integrated test bed Transformer Partial Discharge Detector mechanical properties of high-voltage switches Vacuum Tester Tester Tester Loop Resistance transformer capacity Tester-Load Switching Test Transformer tumor resistance measurement Transformer turns ratio tester tester MOA group tester insulating oil dielectric strength tester transformer loss parameter Intelligent Tester transformer loss-line parameter tester frequency interference dielectric loss dielectric loss tester anti-interference relay tester Ground Yin Xiaxian conduction tester cable fault tester tester tester generator rotor impedance large Grounding Resistance Tester Tester transformer features an integrated micro-moisture meter aperture automatic flash point tester Automatic Closed flash point detector vacuum oil filter boots pressure test device (automatic, semi-automatic) nuclear phase Instrument Series wireless digital core Instrument security tools relative to the mechanical properties testing machine clamp grounding resistance of grounding resistance measuring instrument digital megger digital high-voltage insulation resistance tester and a scalable high-altitude test tools, digital dual-phase volt-ampere facade sequence table clamp Three-phase Power Parameters Tester Calibrator lightning strike counter dedicated test wire, clamping insulation boards, pipe, cable tray mats polyimide film conductor line busbar electric appliances

扬州市苏博电气有限公司扬州市苏博电气有限公司主要产品有TQSW无局部放电工频试验变压器冲击电压发生器变频串联谐振试验成套装置试验变压器干式试验变压器高压分压器放电球隙中频直流发生器高频直流发生器变频大电流多功能接地阻抗测试系统大电流发生器变压器性能综合测试台局部放电检测仪高压开关机械特性测试仪真空度测试仪回路电阻测试仪变压器容量测试仪变压器有载开关测试仪变压器肿瘤电阻测试仪变压器变比组别测试仪氧化锌避雷器测试仪绝缘油介电强度测试仪变压器损耗参数智能测试仪变压器损耗线路参数综合测试仪变频抗干扰介质损耗测试仪抗干扰介质损耗测试仪继电保护测试仪接地引下线导通测试仪电缆故障测试仪发电机转子交流阻抗测试仪大型地网接地电阻测试仪互感器特性综合测试仪微量水分测定仪开口闪点全自动测定仪闭口闪点全自动测定仪真空滤油机绝缘靴耐压试验装置核相仪系列无线数字核相仪安全工具力学性能试验机钳形接地电阻仪接地电阻测量仪数字兆欧表数字高压绝缘电阻测试仪可伸缩高空测试工具数字双钳相位伏安表相序表三相电力参数测试仪雷击计数器校验仪专用测试导线，钳绝缘板，管，垫聚酰亚胺薄膜电缆桥架滑触线母线槽电热电器

Wallet with retractable ID sleeve, ID slot with monofilament window, internal key holder slot, three horizontal and three vertical card slots, extra storage slot, bill compartment with divider, quilted accent with heavy-gauge thread on exterior leather, embroidered icon, and metal bar logo accent.

钱包与可撤回的身份证袖子，身份证槽孔与单丝窗口，内部关键囤户槽孔，三个水平和三个垂直的卡片槽，额外存贮槽孔，票据隔间以分切器，缝制了口音与重丈量螺纹在外部皮革、被绣的像，和金属棒商标口音。

The main products: mechanical and electrical products, power cables, metallurgical burden, building materials, scrap metal recycling, chemical products, metal materials, electrical fittings, cable bridge, highway divider, and to undertake large-scale bridge lifting, loading and transport of bulky, Hoisting large and medium-sized equipment, maintenance of the installation business.

机电产品、电力电缆、冶金炉料、建筑材料、废旧金属回收、化工产品、金属材料、电力金具、电缆桥架、高速公路护栏，并承接大型桥梁吊装、大件吊装和运输、大中型设备吊装、维修安装业务。

MAX1999EEI Pinout: 8- to 32-bit and 16- to 32-bit word packing options Programmable wait state options: 2 to 31 CCLK Digital audio interface includes six serial ports, two pre- cision clock generators, an input data port, three programmable timers and a signal routing unit Serial ports provide: Six dual data line serial ports that operate at up to 50 Mbits/s for a 200 MHz core on each data line each has a clock, frame sync, and two data lines that can be configured as either a receiver or transmitter pair Left-justified sample pair and I2S support, programmable direction for up to 24 simultaneous receive or transmit channels using two I2S compatible stereo devices per serial port TDM support for telecommunications interfaces including 128 TDM channel support for telephony interfaces such as H.100/H.110 Up to 12 TDM stream support, each with 128 channels per frame Companding selection on a per channel basis in TDM mode Input data port provides an additional input path to the DSP core configurable as either eight channels of I2S or serial data or as seven channels plus a single 20-bit wide syn- chronous parallel data acquisition port Supports receive audio channel data in I2S, left-justified sample pair, or right-justified mode Signal routing unit provides configurable and flexible connections between all DAI components, six serial ports, an input data port, two precision clock generators, three timers, 10 interrupts, six flag inputs, six flag outputs, and 20 SRU I/O pins Serial peripheral interface Master or slave serial boot through SPI Full-duplex operation Master-slave mode multimaster support Open drain outputs Programmable baud rates, clock polarities, and phases 3 Muxed Flag/IRQ lines 1 Muxed Flag/Timer expired line ROM based security features: JTAG access to memory permitted with a 64-bit key Protected memory regions that can be assigned to limit access under program control to sensitive code PLL has a wide variety of software and hardware multi- plier/divider ratios JTAG background telemetry for enhanced emulation features IEEE 1149.1 JTAG standard test access port and on-chip emulation Dual voltage: 3.3 V I/O, 1.2 V core Available in 136-ball BGA and 144-lead LQFP packages Lead free packages are also available

MAX1999EEI引脚说明： 8 - 32位和16 - 32位字包装选择可编程等待状态的选择：2至31个CCLK数字音频接口包括6个串行端口，两个前643时钟发生器，输入数据端口， 3可编程定时器和一个信号路由单元串行端口提供：六双串口数据线，在高达50 Mbps的操作/为200兆赫的每个数据行每个人都有一个时钟，帧同步的核心秒，和两个数据可以作为任何一个接收器或发射器对左对齐和I2S配对样本的支持下，最多可同时接收或传送24个频道，每使用两个系列的I2S兼容立体声设备配置可编程方向线；港口的TDM通信接口，包括支持128个电话接口的TDM的渠道，如H.100/H.110支持多达12个的TDM流的支持下，每帧128个频道每个压缩扩展每通道的基础上选择在TDM模式输入数据端口提供了一个额外的输入路径的DSP核心配置为I2S或串行数据或7加一个20位宽的SYN -异步的并行数据采集接口通道或8通道；支持接收通道I2S音频数据，左对齐样本对，或右对齐模式信号路由单元组件之间提供所有戴配置和灵活的连接，6个串行端口，一个输入数据端口，两个精密时钟发生器，3个定时器，10个中断，六旗投入，产出6个旗，20曼谷南南区域股的I / O管脚串行外设接口的硕士或奴隶通过SPI串行启动全双工运作主从模式多主机支持开漏输出可编程波特率，时钟极性和第三期合并调制旗/ IRQ线路1合并调制旗/定时器过期线光盘的防伪特征：JTAG的访问与64位受保护的关键允许内存内存可分配给程序访问控制的限制下对敏感地区有一个代码锁相环/遥测分比率为背景的JTAG仿真功能增强的IEEE 1149.1 JTAG标准测试访问端口的软件和硬件多钳各种各样和片上仿真双电压：3.3六/输出，可在1.2 V核心136球BGA封装和144引脚LQFP封装无铅封装，也可

TDA4864 Pinout: 8- to 32-bit and 16- to 32-bit word packing options Programmable wait state options: 2 to 31 CCLK Digital audio interface includes six serial ports, two pre- cision clock generators, an input data port, three programmable timers and a signal routing unit Serial ports provide: Six dual data line serial ports that operate at up to 50 Mbits/s for a 200 MHz core on each data line each has a clock, frame sync, and two data lines that can be configured as either a receiver or transmitter pair Left-justified sample pair and I2S support, programmable direction for up to 24 simultaneous receive or transmit channels using two I2S compatible stereo devices per serial port TDM support for telecommunications interfaces including 128 TDM channel support for telephony interfaces such as H.100/H.110 Up to 12 TDM stream support, each with 128 channels per frame Companding selection on a per channel basis in TDM mode Input data port provides an additional input path to the DSP core configurable as either eight channels of I2S or serial data or as seven channels plus a single 20-bit wide syn- chronous parallel data acquisition port Supports receive audio channel data in I2S, left-justified sample pair, or right-justified mode Signal routing unit provides configurable and flexible connections between all DAI components, six serial ports, an input data port, two precision clock generators, three timers, 10 interrupts, six flag inputs, six flag outputs, and 20 SRU I/O pins Serial peripheral interface Master or slave serial boot through SPI Full-duplex operation Master-slave mode multimaster support Open drain outputs Programmable baud rates, clock polarities, and phases 3 Muxed Flag/IRQ lines 1 Muxed Flag/Timer expired line ROM based security features: JTAG access to memory permitted with a 64-bit key Protected memory regions that can be assigned to limit access under program control to sensitive code PLL has a wide variety of software and hardware multi- plier/divider ratios JTAG background telemetry for enhanced emulation features IEEE 1149.1 JTAG standard test access port and on-chip emulation Dual voltage: 3.3 V I/O, 1.2 V core Available in 136-ball BGA and 144-lead LQFP packages Lead free packages are also available

TDA4864引脚说明： 8 - 32位和16 - 32位字包装选择可编程等待状态的选择：2至31个CCLK数字音频接口包括6个串行端口，两个前643时钟发生器，输入数据端口， 3可编程定时器和一个信号路由单元串行端口提供：六双串口数据线，在高达50 Mbps的操作/为200兆赫的每个数据行每个人都有一个时钟，帧同步的核心秒，和两个数据可以作为任何一个接收器或发射器对左对齐和I2S样本对支持，最多可同时接收或传送24个频道，每使用两个系列的I2S兼容立体声设备配置可编程方向线；港口的TDM通信接口，包括支持128个电话接口的TDM的渠道，如H.100/H.110支持多达12个的TDM流的支持下，每帧128个频道每个压缩扩展每通道的基础上选择在TDM模式输入数据端口提供了一个额外的输入路径的DSP核心配置为I2S或串行数据或7加一个20位宽的SYN -异步的并行数据采集接口通道或8通道；支持接收通道I2S音频数据，左对齐样本对，或右对齐模式信号路由单元组件之间提供所有戴配置和灵活的连接，6个串行端口，一个输入数据端口，两个精密时钟发生器，3个定时器，10个中断，六旗投入，产出6个旗，20曼谷南南区域股的I / O管脚串行外设接口的硕士或奴隶通过SPI串行启动全双工运作主从模式多主机支持开漏输出可编程波特率，时钟极性和第三期合并调制旗/ IRQ线路1合并调制旗/定时器过期线光盘的防伪特征：JTAG的访问与64位受保护的关键允许内存内存可分配给程序访问控制的限制下对敏感地区有一个代码锁相环/分比率背景遥测的JTAG仿真功能增强的IEEE 1149.1 JTAG标准测试访问端口软件和硬件多钳各种各样和片上仿真双电压：3.3六/输出，可在1.2 V核心136球BGA封装和144引脚LQFP封装无铅封装，也可

Adder is one of the most common operation units in ALU, e.g, subtractor, multiplier, and divider, which are all based on the adder.

而全加器是一个经常被使用的运算单元，在电脑中的任何运算，例如减法、乘法、除法等，都是必须经过加法器来做变化的。

In addition, the gain of the charge pump (114) is adjusted based on the division ratio of the N divider (111) such that the frequency synthesizer has loop characteristics of constant and stable oscillation.

此外，充电帮补的增益值系根据N除法器的分割比例来进行调整，致使频率合成器具有一个固定、稳定的振动回路特性。

At the same time , Recuring to the programed phase discriminator and frequency divider , the value of work frequency was scaled with digit accurately .

同时，借助于可编程鉴相器和分频器电路将信号频率点数字化、精确化。

The split between the two groups can hardly be papered over.

这两个团体间的分歧难以掩饰。

This approach not only encourages a greater number of responses, but minimizes the likelihood of stale groupthink.

这种做法不仅鼓励了更多的反应，而且减少跟风的可能性。