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digital signal相关的网络例句

查询词典 digital signal

与 digital signal 相关的网络例句 [注:此内容来源于网络,仅供参考]

Digital signal processing and analog signal processing is a subset of signal processing.

数字信号处理与模拟信号处理是信号处理的子集。

Signal processing devices can be used analog signal processing devices can also be using digital signal processing devices.

信号处理装置可以采用模拟信号处理装置,也可采用数字信号处理装置。

Digital filter is a digital channel processing, one of the most important component of almost appear in all of the digital signal processing systems.

数字滤波器是数字信处理中最重要的组成部分之一,几乎出现在所有的数字信号处理系统中。

Digital video processing is a kind of digital signal processing technology faced to diversity of digital television formats.

数字视频处理是面向数字电视业务的多样性而产生的数字处理技术。

First, mathematical foundation of synchronization, i.e. the theory of parameter estimation is introduced. Then, DA/DD or NDA timing synchronization methods based on the ML estimation of timing parameter are presented. They are all widely applied in actual digital communication systems. Interpolation theory in digital signal processing has application in timing synchronization, which makes the sampling clock independent of the timing control so that timing adjustment is realized completely through digital disposal. The issue of interpolation in timing synchronization is discussed.

首先,介绍了定时同步实现的数学基础,即信号参数估计理论;从定时参数的最大似然估计出发,介绍了基于数据辅助的定时同步方法和基于非数据辅助的定时同步方法,他们在实际的数字通信系统中均有广泛应用;论文探讨了数字信号处理中插值理论在定时同步中的应用,它使得接收端的采样时钟独立于定时控制,定时调整完全通过数字处理方法得以实现。

The thesis is based on the architecture of All-Digital Frequency and Phase Synthesizer (All-Digital PLL) which is published by Hugh Mair and Liming Xiu. The architecture makes multiple signals of the same frequency and the same phase difference the output of a voltage-control-oscillator to be the internal input of the DCO (flying-adder architecture), and we utilize the control word to decide the desired synchronized output signal.

中文摘要本论文是以Hugh Mair及Liming Xiu所提出之全数位频率与相位合成器架构(All-Digital PLL)为基础来做改良设计,此架构是以多个压控振荡器输出的相同频率及相同相位差的讯号,做为DCO(flying-adder architecture)的内部输出讯号,再以控制位元决定出所欲同步讯号。

On the basement of passband subsampling and digital downconvertion, according to QPSK with 30M carrier frequency and 8M bandwidth, digital IF channel is elaborately analyzed .In this module, multiple phase filters are elaborately designed .According to this module, IF digital signal is simulated .

以对中频为30MHz,带宽为±4MHz的输入QPSK信号进行带通欠采样和数字下变频为基础,提出和分析了中频数字化通道的实现方案,进行了相应的多相低通抽取滤波器的设计,并针对数字中频信号就数字下变频模块进行了仿真,从而验证了整个下变频系统参数设计的可行性。

The phase signal and the quantized analog signal are used to recreate the digital signal.

该相位信号和经过量化的模拟信号被用于重新创建数字信号。

High precision of data acquisition of accelerometers signal is achieved with V/F convertors.V/F convertors convert accelerometers analog signal into impulse which is transmitted to FPGA and converted digital signal.

为保证其高精度,采用了基于电压-频率转换的数据采集单元来完成加速度计信号的数字化。V/F转换器将加速度计输出的模拟信号转换为脉冲量,FPGA采集脉冲量并转换得到自标定模型所需数字量。

The two digital signal types are the on-off signal and the pulse train signal.

这两类数字信号分别为通断信号和脉冲序列信号。

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