查询词典 digital data

Through the discourse on elements of printing quality controlment, and the printing controlling digital and methods, the thesis is going to give an elaboration and analysis on the printing quality controlment, in five aspects as the data transmission in digital flowsheet, color management in open sysem, data transmission and management, digital preliminary and on-line printing quality testing.

通过论述印刷质量控制影响因素和质量控制的数字化及其方法后，从数字化流程中数据流的传递、开放式体系下的色彩管理、数据传输与管理、数码打样、在线印刷质量检测五个方面进行印刷质量控制的阐述和分析。

As a private mobile communication system, The digital trunkingmobile communication system was boomed in 1990's, and before this, the appliedprivate mobile communication systems in market are almost the analog systemwith analog voice and digital signalling. And there are no data referring to thesystem design and parameters chosen. It includes the wireless channel accessalgorithm of the mobile terminals, single base station capacity in large regional networks, link designing schemes between the switching control center and basestation as well as the study of the service quality for the multiple traffic. Theseindispensable parameters in design a digital trunking communication system arestudied in this dissertation and some instructive achievements can be got. To provethe correction of the theoretical study, the result was tested with the popularsystem of pan-European digital trunking communication system.

数字集群移动通信系统是九十年代中、后期兴起的专用移动通信系统的一种新体制，在此之前国际、国内市场使用的都是数字信令、模拟话音集群移动通信系统其涉及领域是模拟体制，对数字集群的系统设计的有关参数、方法等的选用及其性能表现并无成熟的文献可供参考，如移动终端的无线信道接入算法、大区组网单基站系统的容量、基站和交换控制中心间的链路设计和多业务种类的服务质量等都是数字集群基站子系统进行设计和开发必须解决的关键技术。

The basic technology of PKI include encipher digital signature data integrity mechanism digital envelope double digital signature, digital certificate etc.

PKI的基础技术包括加密、数字签名、数据完整性机制、数字信封、双重数字签名，数字证书等。

The base of computer culture, c programmer, fundamentals of analog electronic circuits, fundamentals of digital electronic circuits, data structure, principles of computer composition, operating system, discrete mathematics, computer network, principles of microcomputer, 8086/8088 macro assembler language; multimedia technology; the principles of database; oopl( errorobject oriented programming language); fundamentals of compiling; software engineering; numerical computational method; mcs51/96 principle of single-chip computer; artificial intelligence; computer system organization; digital interface and digital circuits; java programming language; data structure; operating system; computer network; technology of electronics, etc.

计算机文化基础、c语言程序设计、模拟电路基础、数字逻辑电路基础、数据结构、计算机组成原理、操作系统、离散数学、计算机网络、微型计算机原理、8086/8088宏汇编语言程序设计、多媒体技术、数据库原理。面向对象语言程序设计，编译原理，软件工程基础，数值计算方法、mcs51/96系列单片机原理与应用、人工智能、计算机系统结构、数子接口技术与电路、数据库设计基础 java语言，数据结构，操作系统，计算机网络，电子技术等。还有一些选修的课比如：tcp/ip网络协议分析基础、oracl数据库原理，db2数据库原理等。

Fist, comprehensive analysis on the current study on data processing is made, and characters of Newton methods about nonlinear surveying and mapping data processing are discussed, and then new solutions to parameters estimate with multi-sources, multi-types, multi-dimension, multi-precision bynonlinear least square are presented such as PSB algorithm, digital continuation and generalized digital continuation algorithm, cone model method, tensor analysis method, GCMA(mixed algorithm of gradient method and conjugate gradient method), combining algorithm based on Newton method and gradient method and confidence region and so on, and a new fast difference iterative algorithm is proposed towards parameters estimation containing random parameters in nonlinear models, and a new solutions to nonlinear least squares surveying and mapping adjustment by parameters estimation both considering the random and nonrandom parameters is presented after studying on nonlinear data processing in deformation monitoring, and at last primary analysis on error propagation of spatial data is made and approximate error propagation formula and error analysis formula to length and area are proposed.

首先比较全面分析了目前测量数据处理理论的研究现状，讨论了牛顿类方法在处理非线性模型参数估计方面的特点，研究并给出了求解多源、多类型、多维、多精度、非线性最小二乘测量平差参数估计的若干种新方法，这包括PSB算法、数值延拓及其广义数值延拓算法、锥模型法、张量分析法、基于最速下降法和牛顿法的组合算法、基于最速下降

The digital signature is some data that attachment on data units, perhaps password transformation which does to the data unit, this kind of data or the transformation permission data unit receive with by confirmed the data unit the origin and the data unit integrity and the protection data, prevented is carried on by the human fabricates.

数字签名[5]是附加在数据单元上的一些数据，或是对数据单元所作的密码变换，这种数据或变换允许数据单元的接收者用以确认数据单元的来源和数据单元的完整性并保护数据，防止被人进行伪造。

The digital map input and maintenance subsystem performs format conversion,editing and updating of spatial data;the rail-track video playing subsystem uses video recording as reference data,then plays,inquires and traces the corresponding frames in synchronous to the scaled mileage,realizing the query of the active picture frames;the digital map query subsystem fulfills the map query,preview and spelling of digital map orthograph.

其中，地形图输入与维护实现了数字地图的格式转换、编辑处理以及空间数据的更新操作，解决了不同格式空间数据的互相转换问题；线路录象播放将线路录像数据作为系统的一种索引数据，活动影像的画面与里程相对应，实现了基于线路录像的播放、查询和检索的功能，实现了基于活动画面的查询检索功能；数字地图子系统完成了图形查询、数字地图与线路正射图像浏览、图幅拼接等功能。

A simple digital device for detecting human balance function is described. The device acquires data of a shaking body of quizzee using a micro sensor for measuring rotator, transforms the data into digital pulse signal, and displays the metrical results through digital display and an audio annunciator.

一种用于人体平衡功能检测的简易式数字检测系统，它通过旋转型传感器采集被测人体的晃动信息，并转化成数字脉冲信号，配合数字显示和声音报警来显示检测结果。

MAX1999EEI Pinout: 8- to 32-bit and 16- to 32-bit word packing options Programmable wait state options: 2 to 31 CCLK Digital audio interface includes six serial ports, two pre- cision clock generators, an input data port, three programmable timers and a signal routing unit Serial ports provide: Six dual data line serial ports that operate at up to 50 Mbits/s for a 200 MHz core on each data line each has a clock, frame sync, and two data lines that can be configured as either a receiver or transmitter pair Left-justified sample pair and I2S support, programmable direction for up to 24 simultaneous receive or transmit channels using two I2S compatible stereo devices per serial port TDM support for telecommunications interfaces including 128 TDM channel support for telephony interfaces such as H.100/H.110 Up to 12 TDM stream support, each with 128 channels per frame Companding selection on a per channel basis in TDM mode Input data port provides an additional input path to the DSP core configurable as either eight channels of I2S or serial data or as seven channels plus a single 20-bit wide syn- chronous parallel data acquisition port Supports receive audio channel data in I2S, left-justified sample pair, or right-justified mode Signal routing unit provides configurable and flexible connections between all DAI components, six serial ports, an input data port, two precision clock generators, three timers, 10 interrupts, six flag inputs, six flag outputs, and 20 SRU I/O pins Serial peripheral interface Master or slave serial boot through SPI Full-duplex operation Master-slave mode multimaster support Open drain outputs Programmable baud rates, clock polarities, and phases 3 Muxed Flag/IRQ lines 1 Muxed Flag/Timer expired line ROM based security features: JTAG access to memory permitted with a 64-bit key Protected memory regions that can be assigned to limit access under program control to sensitive code PLL has a wide variety of software and hardware multi- plier/divider ratios JTAG background telemetry for enhanced emulation features IEEE 1149.1 JTAG standard test access port and on-chip emulation Dual voltage: 3.3 V I/O, 1.2 V core Available in 136-ball BGA and 144-lead LQFP packages Lead free packages are also available

MAX1999EEI引脚说明： 8 - 32位和16 - 32位字包装选择可编程等待状态的选择：2至31个CCLK数字音频接口包括6个串行端口，两个前643时钟发生器，输入数据端口， 3可编程定时器和一个信号路由单元串行端口提供：六双串口数据线，在高达50 Mbps的操作/为200兆赫的每个数据行每个人都有一个时钟，帧同步的核心秒，和两个数据可以作为任何一个接收器或发射器对左对齐和I2S配对样本的支持下，最多可同时接收或传送24个频道，每使用两个系列的I2S兼容立体声设备配置可编程方向线；港口的TDM通信接口，包括支持128个电话接口的TDM的渠道，如H.100/H.110支持多达12个的TDM流的支持下，每帧128个频道每个压缩扩展每通道的基础上选择在TDM模式输入数据端口提供了一个额外的输入路径的DSP核心配置为I2S或串行数据或7加一个20位宽的SYN -异步的并行数据采集接口通道或8通道；支持接收通道I2S音频数据，左对齐样本对，或右对齐模式信号路由单元组件之间提供所有戴配置和灵活的连接，6个串行端口，一个输入数据端口，两个精密时钟发生器，3个定时器，10个中断，六旗投入，产出6个旗，20曼谷南南区域股的I / O管脚串行外设接口的硕士或奴隶通过SPI串行启动全双工运作主从模式多主机支持开漏输出可编程波特率，时钟极性和第三期合并调制旗/ IRQ线路1合并调制旗/定时器过期线光盘的防伪特征：JTAG的访问与64位受保护的关键允许内存内存可分配给程序访问控制的限制下对敏感地区有一个代码锁相环/遥测分比率为背景的JTAG仿真功能增强的IEEE 1149.1 JTAG标准测试访问端口的软件和硬件多钳各种各样和片上仿真双电压：3.3六/输出，可在1.2 V核心136球BGA封装和144引脚LQFP封装无铅封装，也可

TDA4864 Pinout: 8- to 32-bit and 16- to 32-bit word packing options Programmable wait state options: 2 to 31 CCLK Digital audio interface includes six serial ports, two pre- cision clock generators, an input data port, three programmable timers and a signal routing unit Serial ports provide: Six dual data line serial ports that operate at up to 50 Mbits/s for a 200 MHz core on each data line each has a clock, frame sync, and two data lines that can be configured as either a receiver or transmitter pair Left-justified sample pair and I2S support, programmable direction for up to 24 simultaneous receive or transmit channels using two I2S compatible stereo devices per serial port TDM support for telecommunications interfaces including 128 TDM channel support for telephony interfaces such as H.100/H.110 Up to 12 TDM stream support, each with 128 channels per frame Companding selection on a per channel basis in TDM mode Input data port provides an additional input path to the DSP core configurable as either eight channels of I2S or serial data or as seven channels plus a single 20-bit wide syn- chronous parallel data acquisition port Supports receive audio channel data in I2S, left-justified sample pair, or right-justified mode Signal routing unit provides configurable and flexible connections between all DAI components, six serial ports, an input data port, two precision clock generators, three timers, 10 interrupts, six flag inputs, six flag outputs, and 20 SRU I/O pins Serial peripheral interface Master or slave serial boot through SPI Full-duplex operation Master-slave mode multimaster support Open drain outputs Programmable baud rates, clock polarities, and phases 3 Muxed Flag/IRQ lines 1 Muxed Flag/Timer expired line ROM based security features: JTAG access to memory permitted with a 64-bit key Protected memory regions that can be assigned to limit access under program control to sensitive code PLL has a wide variety of software and hardware multi- plier/divider ratios JTAG background telemetry for enhanced emulation features IEEE 1149.1 JTAG standard test access port and on-chip emulation Dual voltage: 3.3 V I/O, 1.2 V core Available in 136-ball BGA and 144-lead LQFP packages Lead free packages are also available

TDA4864引脚说明： 8 - 32位和16 - 32位字包装选择可编程等待状态的选择：2至31个CCLK数字音频接口包括6个串行端口，两个前643时钟发生器，输入数据端口， 3可编程定时器和一个信号路由单元串行端口提供：六双串口数据线，在高达50 Mbps的操作/为200兆赫的每个数据行每个人都有一个时钟，帧同步的核心秒，和两个数据可以作为任何一个接收器或发射器对左对齐和I2S样本对支持，最多可同时接收或传送24个频道，每使用两个系列的I2S兼容立体声设备配置可编程方向线；港口的TDM通信接口，包括支持128个电话接口的TDM的渠道，如H.100/H.110支持多达12个的TDM流的支持下，每帧128个频道每个压缩扩展每通道的基础上选择在TDM模式输入数据端口提供了一个额外的输入路径的DSP核心配置为I2S或串行数据或7加一个20位宽的SYN -异步的并行数据采集接口通道或8通道；支持接收通道I2S音频数据，左对齐样本对，或右对齐模式信号路由单元组件之间提供所有戴配置和灵活的连接，6个串行端口，一个输入数据端口，两个精密时钟发生器，3个定时器，10个中断，六旗投入，产出6个旗，20曼谷南南区域股的I / O管脚串行外设接口的硕士或奴隶通过SPI串行启动全双工运作主从模式多主机支持开漏输出可编程波特率，时钟极性和第三期合并调制旗/ IRQ线路1合并调制旗/定时器过期线光盘的防伪特征：JTAG的访问与64位受保护的关键允许内存内存可分配给程序访问控制的限制下对敏感地区有一个代码锁相环/分比率背景遥测的JTAG仿真功能增强的IEEE 1149.1 JTAG标准测试访问端口软件和硬件多钳各种各样和片上仿真双电压：3.3六/输出，可在1.2 V核心136球BGA封装和144引脚LQFP封装无铅封装，也可

The split between the two groups can hardly be papered over.

这两个团体间的分歧难以掩饰。

This approach not only encourages a greater number of responses, but minimizes the likelihood of stale groupthink.

这种做法不仅鼓励了更多的反应，而且减少跟风的可能性。