查询词典 digital clock

We have been working hard against the clock all day in order to complish the report by 5 clock.

为了能在五点之前完成报告，我们一整天都在分秒必争地工作。

Zhang Chunyun: 2007 when keep somebody asks me, it is us the engineer inside this community, I call eagle inside community, I am the earliest this company has 10 stuff, this money was spent later, my person becomes to work after was being spent, arrived at 7 o'clock in the morning in the evening at 12 o'clock, this time is inside this community not of rubbish of be patient of, safeguard first-rately, very clean.

张春昀：2007年的时候就不停地有人问我，就是我们这个社区里面的工程师，我在社区里面叫老鹰，我最早这个公司有10个员工，后来这个钱花了，花了以后就变成我一个人来干，早上7点到晚上12点，这个时间这个社区里面是不答应有垃圾的，维护得非常好，非常干净。

The Clock Tower is the world's largest four-faced, chiming clock.

大笨钟，又叫大本钟，位于泰晤士河畔，是伦敦标志。

There was great disagreement about the design of the clock, with the result that it took fifteen years to build. The first bell was made and tested on the ground in 1857, but a four-foot crack developed and the bell had to be cast again. Eventually, the clock started ticking on 31 May, 1859, and struck its first chime on 11 July.

此外，钟的设计也曾有很大的争议，结果历时15年才完工。1857年制造的第一只钟在地面实验时，发现钟体上有一条四英尺长的裂缝，只好重铸钟。1859年5月31日，这只钟终于开始滴滴答答地转动，7月11日开始第一次报时。

This CPU works at 2.16GHz nominal clock speed and 13x clock frequency multiplier.

这中央处理器工程名义为2.16时钟速度和13 x的时钟频率倍增器。

Besides, the Guans also equipped their library with a Germany made clock to compete directly with the US made clock of the Situ family.

关族人还别出心裁地安装了一个德国大钟与司徒氏图书馆的美国波士顿机械钟相抗衡。

In addition to setting the clock frequency, the master must also configure the clock polarity and phase with respect to the data. Freescale's SPI Block Guide [1] names these two options as CPOL and CPHA respectively, and most vendors have adopted that convention.

除了设置时钟频率，主设备同样需要设置数据传输相关的时钟极性以及相位。freescale'sSPI的手册命名这分别以cpol以及cpha来标志时钟的极性以及相位，大部分的芯片厂商采用了这种协定。

Pinout: C High-performance 32-bit RISC Architecture C High-density 16-bit Instruction Set C Leader in MIPS/Watt C Little-endian C Embedded ICE (In-circuit Emulation) 8-, 16- and 32-bit Read and Write Support 256K Bytes of On-chip SRAM C 32-bit Data Bus C Single-clock Cycle Access Fully Programmable External Bus Interface C Maximum External Address Space of 64M Bytes C Up to Eight Chip Selects C Software Programmable 8/16-bit External Data Bus Eight-level Priority, Individually Maskable, Vectored Interrupt Controller C Four External Interrupts, including a High-priority, Low-latency Interrupt Request 32 Programmable I/O Lines Three-channel 16-bit Timer/Counter C Three External Clock Inputs C Two Multi-purpose I/O Pins per Channel Two USARTs C Two Dedicated Peripheral Data Controller Channels per USART Programmable Watchdog Timer Advanced Power-saving Features C CPU and Peripheral Can be Deactivated Individually Fully Static Operation: C 0 Hz to 75 MHz Internal Frequency Range at VDDCORE = 1.8V, 85C 2.7V to 3.6V I/O Operating Range 1.65V to 1.95V Core Operating Range -40C to +85C Temperature Range Available in 100-lead TQFP Package

M5L8253P-5引脚说明： C型高性能32位RISC架构C高密度以MIPS /瓦C小端C十六位指令集C领袖嵌入式冰8 - 16 -位和32位的读写支持256K的片上SRAM的 32位数据总线C单时钟周期存取字节完全可编程的外部总线接口C最大的外部地址空间的64M字节多达8个C芯片选择C软件可编程8位外部数据总线8级优先级，独立可屏蔽，向量中断控制器C四外部中断，其中包括一个高优先级，低延迟中断要求32个可编程I / O口线三通道16位定时器/计数器C三个外部时钟输入C两多用途I / O引脚每通道2个通用同步C两专用外设数据控制器通道每个USART可编程看门狗定时器先进的节能特性 CPU和外设可停用独立全静态工作中：C 0 Hz至75 MHz的频率范围内的VDDCORE = 1.8，85℃2.7V到3.6VI / O的操作1.65V到1.95V范围核心工作电压范围在- 40C至+85 C温度范围内使用的100引脚TQFP封装

For every pass, each clock slave component generates and transmits a first timing cell to the clock master.

每一遍，每个从时钟部件产生并发送第一定时信元至主时钟。

SYNCHRONOUS OPERATION For synchronous operation, the same master clock and bit clock should be used for both the transmit and receive directions.

对于同步操作同步操作，相同的主时钟和位时钟都应该用于发送和接收方向。

Nowadays, most of research are to build a transmutative Petri Nets through adding controlling place sets, controlling arc sets and controlling policy to the basic Petri Nets, while the Controlled Petri Nets could be used to argue many controlling theory problems conveniently and to induce many logically and physically supervisory and solve the Event Feedback Controlling Problems and State Feedback Controlling Problem in DEDS supervisory theory.

目前大多数的研究表现为在变形后的受控Petri网基础上，利用各种方法求得各种逻辑型、结构型控制器，解决DEDS监控理论中的事件反馈控制问题与状态反馈控制问题。

On one hand, there are discussions with the works council and union about extension of short time working up to the end of September.

一方面，有讨论，工程理事会和联盟关于延长工作时间短至9月底。