查询词典 data-out bus

The system bus is divided into three logical functions; the address bus, the data bus and the control bus .

系统总线的功能在逻辑上被划分为三部分：地址总线、数据总线和控制总线。

Therein, by adopting the ISCSI protocol, the local data storage sub-system constructs the circuital access pattern of the taxation data. The system eliminates the unbalance phenomena between the capability and the demand of the data storage under the traditional bus storage pattern. Under the centralized control pattern, it provides the information access and shares service with the great data volume, the high speed of data transportation and the high availability for the taxation system. By remotely building a backup data center that is totally consistent with the local data center on the IT foundational fabric, the remote data backup sub-system uses the geographical dispersibility of the remote data center and adopts the LVR software replication technology. It implements the synchronous data replication between the local and remote data center, changes the zero standing capability on the great disaster event under the single data center pattern and raises the standing capability on the disaster events for the application and data in the taxation system. By adopting the dynamic replication technology between the heterogeneous data source, the heterogeneous data conformity sub-system successfully shields the various heterogeneous ingredients of the present system.

其中，本地数据存储子系统采用ISCSI协议构建了税务数据网络存储模式，消除了传统总线型存储模式下数据存储性能和存储需求之间的失衡现象，在集控管理模式下为税务系统提供了超大数据容量、高数据传输率和高可用性的信息存取和共享服务；远程数据备份子系统通过在异地构建一个和本地数据中心IT基础架构完全一致的备份数据中心，利用远程数据中心在地理上的分散性，基于LVR软件复制技术实现了本地和远程数据中心之间信息的实时同步，改变了过去单一数据中心模式下对大型灾难事件的零抗灾能力，提高了税务系统内应用和数据对灾难性事件的抵御能力；异构数据整合子系统采用异类数据源动态复制技术，成功屏蔽了目前系统内存在的各项异构成分。

Lastly, this paper introduces the concept of data service bus, and explains its important role in system integration.

最后，引入数据服务总线的概念，对总线的作用进行了阐述。

In the M51954AFP, when MRD = 1, it enables the three-state bus drivers (DB0-DB3) and transfers data from the DATA-IN lines onto the data bus.

在M51954AFP，当MRD的= 1，它使三态总线驱动程序（DB0 - DB3小波），从数据中的数据总线上传输数据。

When the floppy disc drive is not writing data to or reading data from the disc, data read from the disc is supplied sector by sector from the buffer memory to the system bus or data to be written to the disc is supplied sector by sector to the buffer memory from the system bus.

当软盘驱动器不是正在将数据写入盘或从盘读取数据时，从盘读取的数据逐个扇区地从缓冲存储器传输到系统总线或待写入盘的数据逐个扇区地从系统总线传输到缓冲存储器。

During the design of VXI-bus Serial Controller Module, the functions of VXI-bus including time-sequence for VXI interface, resource management, interrupt process, bus arbitration, are accomplished. To advance the performance and stability, the FPGA technic is used to implement the kerneled code including serial bus time-sequence switching to VXI interface time-sequence, the UART, the Parameterized Baud Generator and"Pipeling frame". The handle type of Data Transfer Bus for VXI-bus is researched thoroughly, and the format of serial data transfer is designed.

在VXI总线串行控制器设计中，实现了VXI总线控制器的基本功能，包括VXI总线接口时序、总线仲裁、超时处理等；同时利用先进的FPGA技术实现了串行总线时序向VXI总线时序的转换、通用异步收发器、参数化波特率发生器、流水线结构等功能模块；在设计中还深入研究了VXI总线数据传输的各种操作类型，制定了串行数据传输的编码格式。

Big-Endian ConfigurationA signed byte load expects data on data bus inputs 31 through to 24 if the supplied address is on aword boundary, on data bus inputs 23 through to 16 if it is a word address plus one byte, and so on.

大尾段配置阿签署字节负载预计在31日的数据总线输入数据，如果通过向24所提供的地址上的字的边界，数据总线投入23日至16如果它是一个字地址加上一个字节，依此类推。

For example, if a register isconnected to the data bus in an 8-bit machine. eachline of the bus connects to register.Because the databus will be an 8一bit bus, there are 8-bit Flip-flopsthat form the register, When there is information onthe data bus,and a particular register is selected toreceive data, all the Flip-flops will store data simultancously. This kind of register is refer is referred to as aparallel register.

例如，如果寄存器被联接到一台8位机的数据总线上，那么，该总线的每一条线均联接到寄存器上，因为数据总线是8位总线，所以有9个触发器来形成寄存器，当在数据总线上有信息，并且选择了一个特定的寄存器来接收数据时，那么所有的触发器将同时存储数据，这种形式的寄存器叫做&并行寄存器&。

Pinout: C High-performance 32-bit RISC Architecture C High-density 16-bit Instruction Set C Leader in MIPS/Watt C Little-endian C Embedded ICE (In-circuit Emulation) 8-, 16- and 32-bit Read and Write Support 256K Bytes of On-chip SRAM C 32-bit Data Bus C Single-clock Cycle Access Fully Programmable External Bus Interface C Maximum External Address Space of 64M Bytes C Up to Eight Chip Selects C Software Programmable 8/16-bit External Data Bus Eight-level Priority, Individually Maskable, Vectored Interrupt Controller C Four External Interrupts, including a High-priority, Low-latency Interrupt Request 32 Programmable I/O Lines Three-channel 16-bit Timer/Counter C Three External Clock Inputs C Two Multi-purpose I/O Pins per Channel Two USARTs C Two Dedicated Peripheral Data Controller Channels per USART Programmable Watchdog Timer Advanced Power-saving Features C CPU and Peripheral Can be Deactivated Individually Fully Static Operation: C 0 Hz to 75 MHz Internal Frequency Range at VDDCORE = 1.8V, 85C 2.7V to 3.6V I/O Operating Range 1.65V to 1.95V Core Operating Range -40C to +85C Temperature Range Available in 100-lead TQFP Package

M5L8253P-5引脚说明： C型高性能32位RISC架构C高密度以MIPS /瓦C小端C十六位指令集C领袖嵌入式冰8 - 16 -位和32位的读写支持256K的片上SRAM的 32位数据总线C单时钟周期存取字节完全可编程的外部总线接口C最大的外部地址空间的64M字节多达8个C芯片选择C软件可编程8位外部数据总线8级优先级，独立可屏蔽，向量中断控制器C四外部中断，其中包括一个高优先级，低延迟中断要求32个可编程I / O口线三通道16位定时器/计数器C三个外部时钟输入C两多用途I / O引脚每通道2个通用同步C两专用外设数据控制器通道每个USART可编程看门狗定时器先进的节能特性 CPU和外设可停用独立全静态工作中：C 0 Hz至75 MHz的频率范围内的VDDCORE = 1.8，85℃2.7V到3.6VI / O的操作1.65V到1.95V范围核心工作电压范围在- 40C至+85 C温度范围内使用的100引脚TQFP封装

Taking the communication server as the core,the data transmission layer collects data from other intelligent devices with 103 protocols,Modbus protocols,pro-bus protocols or TCP / Modbus protocols,which are converted as dual Ethernet network data and then transmitted to monitoring system and dispatch center via hub.

重点介绍了通信网络的构成，网络管理层基于TCP/IP的以太网络通信，采用站内103通信规约，数据传输层以通信服务器为核心，向下采集其他智能设备数据，支持任何采用103规约及采用Modbus通信规约、pro-bus通信规约或采用TCP/Modbus协议的智能设备，并将采集到的数据转换成以太网双网数据，通过交换机上传至监控系统及调度中心。

Singer Leona Lewis and former Led Zeppelin guitarist Jimmy Page emerged as the bus transformed into a grass-covered carnival float, and the pair combined for a rendition of "Whole Lotta Love".

歌手leona刘易斯和前率领的飞艇的吉他手吉米页出现巴士转化为基层所涵盖的嘉年华花车，和一双合并为一移交&整个lotta爱&。

This is Kate, and that's Erin.

这是凯特，那个是爱朗。