查询词典 data input bus

XC68HC11F1FN Pinout:(1) Power saving driver (2) Built in DA converter accepting 6-bit digital input (for 262,144 colors)(3) Choice of 360 and 324 drive outputs (4) Input data bus at pixel level (5) Choice of output data format: gray scale or binary (6) Eleven reference voltage inputs for producing 10 segment gamma adjustment graph.

XC68HC11F1FN引脚说明：（1）省电驱动程序（2）内置DA转换器接受6位数字输入（为262，144色）（3）选择360和324驱动器输出（4）输入的像素数据总线一级（5）输出数据格式选择：灰阶或二进制（6）11参考生产10段伽玛调整图形电压输入。

SAK-C167CR-LM easily expands data bus width to 32 bits or more using the Master/Slave select when cascading more than one device M/S = VIH for BUSY output flag on Master M/S = VIL for BUSY input on Slave BUSY and Interrupt Flag On-chip port arbitration logic Full on-chip hardware support of semaphore signaling between ports Fully asynchronous operation from either port LVTTL-compatible, single 3.3V (0.3V) power supply Available in 84-pin PGA, 84-pin PLCC and 100-pin TQFP Industrial temperature range (-40C to +85C) is available for selected speeds

朔C167CR - LM滚动轻松扩展数据总线的宽度为32位或更多的使用主/从选择当级联多个器件M / S的=关于硕士M / S的=忙输出标志VIH VIL数值就投入繁忙和忙碌的奴隶中断标志片全部港口的仲裁逻辑芯片上的信号灯的信号港口之间的异步操作完全由硬件支持任何港口的LVTTL兼容，（为0.3V）电源可在84引脚PGA的，84引脚PLCC和单3.3V 100引脚TQFP工业温度范围（- 40C至+85 C）是选定的速度可

MBRD1035CTLT4G easily expands data bus width to 32 bits or more using the Master/Slave select when cascading more than one device M/S = VIH for BUSY output flag on Master M/S = VIL for BUSY input on Slave BUSY and Interrupt Flag On-chip port arbitration logic Full on-chip hardware support of semaphore signaling between ports Fully asynchronous operation from either port LVTTL-compatible, single 3.3V (0.3V) power supply Available in 84-pin PGA, 84-pin PLCC and 100-pin TQFP Industrial temperature range (-40C to +85C) is available for selected speeds

1第1页，本页显示记录1-11，共11条记录分1页显示MBRD1035CTLT4G轻松扩展数据总线的宽度为32位或更多的使用主/从选择当级联多个器件M / S的= VIH对奴隶繁忙投入繁忙和中断标志对主M / S的= VIL数值忙输出标志上港口全部仲裁逻辑芯片的片上信号信号港口之间的异步操作完全由硬件支持任何港口的LVTTL兼容，（为0.3V）电源可在84引脚PGA巡回赛，84引脚PLCC和100引脚TQFP封装3.3V单工业温度范围（- 40C至+85 C）是选定的速度可

The last but not least, it is also owning to the rapid development in computer science and information technology. Such as, some computational task, which previously must be executed by using super-computer, now can be carried out by personal computer, and at the same time, the network speed and band width of data bus and input/output equipment have increased several times. In addition, the improvement of the high quality graphic displaying is available. All these provide strong support for cryoEM high-resolution reconstruction study.

目前，在低电子剂量的情况下，冷冻电镜照片可以记录到3-4 〓的信息，使用冷冻电子显微镜进行高分辨三维重构工作，已经获得6.5-8〓高分辨率水平的结果，可以分辨出蛋白质的α螺旋、识别出蛋白质的β折叠等蛋白质二级结构；其次是，三维重构算法效能的不断提高，使得对二十面体取向和中心参数计算的可靠性大大提高；再次是，由于计算机和信息技术迅猛发展，例如，以往需要使用大型计算机的计算任务已经可以被一般的个人电脑完成，网络速度、数据总线和硬盘等I／O设备的带宽成倍增长，以及图像显示能力的提高都为冷冻电子显微镜高分辨三维重构技术提供了强有力的支持。

Nowadays, in the low electron dose condition, the information about 3-4〓 can be recorded on the cryoEM micrograph, and the high-resolution reconstruction using the cryoEM has reached 6. 5-8〓 levels. The reconstruction can reveal the protein α helical and recognise β fold secondary structure. Secondly, it is due to the development in 3D reconstruction method, which can be more efficient to determine the orientation and center parameters. The last but not least, it is also owning to the rapid development in computer science and information technology. Such as, some computational task, which previously must be executed by using super-computer, now can be carried out by personal computer, and at the same time, the network speed and band width of data bus and input/output equipment have increased several times. In addition, the improvement of the high quality graphic displaying is available. All these provide strong support for cryoEM high-resolution reconstruction study.

目前，在低电子剂量的情况下，冷冻电镜照片可以记录到3-4 〓的信息，使用冷冻电子显微镜进行高分辨三维重构工作，已经获得6.5-8〓高分辨率水平的结果，可以分辨出蛋白质的α螺旋、识别出蛋白质的β折叠等蛋白质二级结构；其次是，三维重构算法效能的不断提高，使得对二十面体取向和中心参数计算的可靠性大大提高；再次是，由于计算机和信息技术迅猛发展，例如，以往需要使用大型计算机的计算任务已经可以被一般的个人电脑完成，网络速度、数据总线和硬盘等I／O设备的带宽成倍增长，以及图像显示能力的提高都为冷冻电子显微镜高分辨三维重构技术提供了强有力的支持。

The main content of the dissertation is designing and realizing the total scheme and frame of system software. The module of the input and output is designed by using the generally I/O of the multichannel buffered serial port to simulated the communication of I~2C bus. The Ping-Pong buffer is brought forward to resolve the problem of the data rate matching. The logic switch function is designed in the programmed logic devices. The data transmission rate is improved by using the DMA and the dual buffer mechanism. The system program self-loading is realized by the design of the self-leading program. Lastly, the dissertation analyzes the characteristic of LLL video and experimentalize with some typical image processing algorithm.

主要对系统软件的总体方案与框架结构进行设计实现，内容包括利用通用串行口模拟I~2C通讯实现输入／输出模块的设计，提出乒乓缓冲结构来解决数据的速度匹配问题，利用可编程逻辑器设计完成逻辑切换控制功能，利用DMA并行传输方式并设计双缓冲结构提高数据的传输速度，设计自引导程序来实现系统程序自加载，最后深入探讨了微光视频图像的特征说明了几种典型的微光图像处理算法的原理，参考这些处理算法设计能在高速视频图像处理器上实现的软件方法，并做了一部分相关的实验研究。

C Supports both Firmware Hub and LPC Memory Read and Write Cycles Auto-detection of FWH and LPC Memory Cycles C Can Be Used as FWH for Intel 8xx, E7xxx, and E8xxx Series Chipsets C Can Be Used as LPC Flash for Non-Intel Chipsets Flexible, Optimized Sectoring for BIOS Applications C 16-Kbyte Top Boot Sector, Two 8-Kbyte Sectors, One 32-Kbyte Sector, Three 64-Kbyte Sectors C Or Memory Array Can Be Divided Into Four Uniform 64-Kbyte Sectors for Erasing Two Configurable Interfaces C FWH/LPC Interface for In-System Operation C Address/Address Multiplexed Interface for Programming during Manufacturing FWH/LPC Interface C Operates with the 33 MHz PCI Bus Clock C 5-signal Communication Interface Supporting Byte Reads and Writes C Two Hardware Write Protect Pins: TBL for Top Boot Sector and WP for All Other Sectors C Five General-purpose Input Pins for System Design Flexibility C Identification Pins for Multiple Device Selection C Sector Locking Registers for Individual Sector Read and Write Protection A/A Mux Interface C 11-pin Multiplexed Address and 8-pin Data Interface C Facilitates Fast In-System or Out-of-System Programming Single Voltage Operation C 3.0V to 3.6V Supply Voltage for Read and Write Operations Industry-Standard Package Options C 32-lead PLCC C 40-lead TSOP

0第0页，本页显示记录0-0，共0条记录分0页显示C支持两种固件中心和LPC内存读取和写入周期自动的FWH和LPC的记忆圈C检测可以用于英特尔8xx系列，E7xxx，E8xxx系列芯片组和C可以用作FWH与至于非英特尔芯片组的BIOS应用柔性优化扇区开放16字节热门引导扇区，两个8 - Kbyte的，一个32字节部门，3个64 - Kbyte的C或存储阵列，线性预测编码闪光可分为四个统一为两个可配置的接口擦除的FWH / LPC接口为64 - Kbyte的行业，系统运行C地址/地址多路复用在制造过程中用于编程接口的FWH /线性预测编码界面C与33 MHz的PCI总线时钟 5信号通信接口进行操作，支持字节读取和写入引导扇区的顶部和WP C两硬件写保护引脚：任务型为所有其他部门 5个通用输入的系统设计的灵活性识别的多种设备选型部门登记销锁定为个别部门读取和写保护的A /阿复用界面C 11引脚复用引脚地址和8引脚的数据界面C促进快速系统内或外的系统编程的单电压3.0V至3.6V的操作供应的读取和写入操作业界标准的封装选项电压 32 -引脚PLCC 40引脚的TSOP

The system adopts CPU board with fast processing elevator operational program, data signal exchange, and HMI screen, which can make sure reliable operation and high speed. It also has PHILIPS SJA1000T field CAN bus, 82C251 Bus interface and the latest serial storage technique to record data. The functions of external watchdog and control chip internal watchdog compose two-level procedure monitoring, so as to ensure the normal operation of the control program. Heavy-current switch power LM2576 ensures the stable system working power, which has low requirements for the power supply. High-speed optoelectronic isolator and internal frequency division technology can make NW3P08-41C (42C) CPU receive the input impulse up to 1-phase 100 KHZ*2 CHANEL or 2-phase 50KHZ*1 CHANEL 32bit.

系统采用原装中央处理板，具有快速的处理电梯运行程序、数据信号交换、显示屏人机界面；确保可靠运行电梯控制程序；且速度快，PHILIPS 公司 SJA1000T 现场 CAN 总线；以及 82C251BUS 接口，最新串行存贮技术记录数据；外部看门狗及控制芯片内部看门狗功能组成两级程序监视，确保控制程序正常运行；大电流开关电源 LM2576 确保系统工作电源稳定，且对供电电源要求低；高速光电隔离光藕及微机内部分频技术，使 NW3P08-41C(42C)中央处理板可接收高达 1 相 100KHZ*2通道或 2 相 50KHZ*1通道，32bit 的计数脉冲。

This brought fixed cost, but it also is meant at the same time use a source to won't make you singlehanded assume a problem.

这带来了一定的成本，但它同时也意味着使用开源不会让你独力承担问题。

He gained a small fortune in real estate.

他在房地产上发了一笔小财。