查询词典 data input bus

Inputs and Outputs Front Panel: Phones: Standard headphone output jack (gold-plated) Video 4: Gold-plated stereo RCA jacks, gold-plated RCA composite video jack and S-video jack Digital Optical 3 Input: Standard Toslink digital input with a plastic protective plug Digital Coax 3 Input: Standard gold-plated coaxial digital jack Back Panel: AM Loop Antenna Input: Two thumb screw connections FM 75-ohm Antenna input: Threaded "F" type connector Tape Input/Output: Stereo RCA jacks Video 3 Input: Stereo RCA jacks, RCA composite video jack and S-video jack Video 2 Input/Output: Stereo RCA jacks, RCA composite video jacks and S-video jacks Video 1 Input/Output: Stereo RCA jacks, RCA composite video jacks and S-video jacks DVD Input: Stereo RCA jacks, RCA composite video jack, and S-video jack CD Input: Stereo RCA jacks Monitor Output: RCA composite video jack and S-video jack Subwoofer Preamp Output: 1 RCA jack Digital Optical 1 Input: Standard Toslink digital input with a plastic protective plug Digital Optical 2 Input: Standard Toslink digital input with a plastic protective plug Digital Coax 1 Input: Standard coaxial digital jack Digital Coax 2 Input: Standard coaxial digital jack Digital Optical Output: Standard Toslink digital output with a plastic protective plug Digital Coax Output: Standard coaxial digital jack Remote Control In/Out Jacks: One mini-jack input and one mini-jack output Speaker Outputs: Binding post outputs for front left, front right, surround left, surround right, and center speakers (posts are not 5-way binding posts, because each post has a plastic collar that prevents used with spade lugs and the posts are too far apart to use dual banana plugs) AC Outlets: One unswitched AC outlet and one switched AC outlet

投入和产出接待小组：电话：标准耳机输出插孔视频4 ：镀金立体声RCA插孔，镀金的RCA复合视频插孔和S - Video插孔数字光学3输入：标准Toslink数字输入与一个塑料保护插头数字同轴3输入：标准镀金同轴数字接口背板：上午环形天线输入：两个拇指螺丝连接调频75欧姆天线输入：线程的& F &型连接器，磁带输入/输出：立体声RCA插孔视频3输入：立体声RCA插孔，插孔的RCA复合视频和S - Video插孔视频2输入/输出：立体声RCA插孔，莲花复合视频插孔和S - Video插孔视频1输入/输出：立体声RCA插孔，插孔的RCA复合视频和S端子接口的DVD输入：立体声RCA插孔，插孔的RCA复合视频和S -视频CD输入端插孔：立体声RCA插孔监视器输出：复合视频的RCA插孔和S - Video插孔低音前置输出： 1的RCA插孔数字光1输入：标准Toslink数字输入与一个塑料保护插头数字光2输入：标准Toslink数字输入与一个塑料保护插头数字同轴输入1 ：标准同轴数字接口数字同轴2输入：同轴数字接口标准数字光输出：标准Toslink数字输出塑料防护插件数字同轴输出：标准同轴数字接口远程控制在/输出插孔：一个迷你插孔输入和1个小型插孔输出扬声器输出：结合后产出的左前方，右前方，左环绕，右环绕和中心发言（职位不是5个具有约束力的方式，因为每个职位有一个塑料环，可以防止使用铁锹派和职位过于遥远使用双香蕉插头）交流插座：一个unswitched AC插座和一个开关AC电源插座

The invention provides a dual redundant CAN bus controller, which is arranged on a crewel CAN bus, characterized in that: two CAN bus transceiving modules, two initializing modules are respectively corresponding to the CAN bus controller module A and CAN bus controller module B; the two CAN bus controller modules are respectively connected to the two CAN bus via a driver shifting control unit; the initializing module is connected to the bus control initializing register for initializing the e CAN bus controller modules; a protocol processing module is connected to the FIFO buffer; the FIFO buffer is connected to the node processor via the logical interface; a intermitting process unit sends the corresponding intermitting control signal to the CAN bus transceiving modules according to the CAN bus controller modules; one path of the CAN bus controller module is directly connected to the protocol processing module; another path is connected to the protocol processing module via the bus receiving buffer.

本发明提供了一种双冗余CAN总线控制器，设置于双线CAN总线上，其特征在于：两个CAN总线收发模块、两个初始化模块分别与CAN总线控制器模块A和CAN总线控制器模块B相对应；两个CAN总线控制器模块通过驱动器切换控制单元分别与两条CAN总线相连；初始化模块与总线控制器初始化寄存器相连，对所对应的CAN总线控制器模块进行初始化；协议处理模块与FIFO缓存器相连；FIFO缓存器通过逻辑接口与节点处理器连接；中断处理单元根据CAN总线控制器模块的控制命令对CAN总线收发模块发出相应的中断控制信号；CAN总线收发模块一路与协议处理模块直接相连，另一路通过总线接收缓存器与协议处理模块相连。

This article considers that the pre-schooler special-purpose school bus market potential is huge, after the analysis of the present situation of pre-schooler education in our country and pre-schooler school bus accidents in partial provinces and cities during 2005～2007. The security situation of school buses is unoptimistic. From the perspective of security, the complete form of the pre-schooler special-purpose school bus is reqestted on the basic of study of the school buses security measure in home and abroad. According to the statistical analysis of the human body size related to 3～6 year-old pre-schooler, the child chair's 6 main parameters, the passenger gate steps, and arm rest's size, as well as crossing control arm's mounting height and performance requirement have been determined. According to the present domestic and outside related standards to exports to the bus and school bus, the least quantities and most light-sized of the exports of school bus are proposed. According to the present domestic and outside standards to the request of driver's field of vision of bus and school bus, the essential requirements and inspection procedure of the field of vision of the pre-schooler special-purpose school bus are setted.

本文通过对我国学龄前儿童教育的现状和2005～2007年部分省市的学龄前儿童校车事故分析，认为学龄前儿童专用校车的市场潜力巨大，校车的安全形势不容乐观；在研究国内、外校车的安全措施基础上，从安全角度出发，对学龄前儿童专用校车提出了整车要求；根据对3～6岁学龄前儿童相关人体尺寸的统计分析，确定了学龄前儿童专用校车儿童座椅的6个主要参数、乘客门踏步和扶手的尺寸，以及横向控制臂的安装高度和性能要求；根据国内、外现行标准中对客车和校车出口的相关规定，提出了校车出口的最少数量和最小尺寸；按照国内、外现行标准中对客车和校车驾驶员的视野要求，提出了学龄前儿童专用校车驾驶员视野的基本要求和检验方法。

The case of a bus route in Qinghuangdao was studied. The analysis results show that the efficient way to improve bus accessibility is to keep bus headway not more than 5 min, so that the optimum bus-stop spacing is below 600 m no matter how much the bus passenger demand is. But on condition of higher bus headways, optimum bus-stop spacing should be in the range of 900 to 1400 m and the bus accessibility would drop more remarkably compared with lower bus headways.

以秦皇岛公交线路为实例，结果显示提高公交可达性的有效途径是使用不大于5min的低发车间隔，无论公交客流量大小，最优公交站距都可以保持在600m以下；而对高发车间隔，公交站距在900~1400m才能获得较高的可达性，而相比低发车间隔，公交可达性显著下降。

Transmit Softclipping Time Constant Receiving Input Sidetone Network Input Line Current Regulation Stop Value Microphone Input Microphone Input Transmit Gain Adjustment Transmit and Receive Part Power Supply Ground Line Current Source Power Supply Voltage Stabilizer Positive Line Unregulated Microcontroller Power Supply Receive Gain Adjustment Negative Earphone Output Positive Earphone Output Ringer Buzzer Output Ring Power Supply Reset Power On Ring Indicator Oscillator Input Mask, Ring Melody Input Data Input Data Clock Input Microcontroller Stabilized Power Supply Reference Voltage (VCC/2) DTMF Filter

1第1页，本页显示记录1-8，共8条记录分1页显示发送Softclipping时间常数接收输入侧音网络输入线电流调节停止价值麦克风输入麦克风输入发射增益调整发送和接收部分电源地线电流源电源稳压器的正电源线无管制的单片机接收增益调整负耳机输出耳机输出正林格蜂鸣器输出电源供应环环指标振荡器输入掩码电复位，环旋律输入数据输入数据时钟输入单片机的稳定电源参考电压（Vcc / 2）双音多频滤波器

The paper holds the idea that, parallel bus can;t adapt to high-speed transfers due to self-limitations, and high-speed serial point-to-point bus will substitute for traditional parallel bus; data transfer will not be carried out simply by drive circuit and parallel bus, but by special high-speed serial bus; the traditional mode of single bus loading multi-device is disappearing, and a centralized switch module is replacing the bus function in a mode of one switch module connecting all devices via high-speed point to point serial bus.

文章认为并行总线由于自身缺陷，已经不适合进行高速传输，高速串行点对点连接将代替传统的并行接口；数据交换也不再是简单地通过驱动电路和并行数据线进行，而是通过特殊的串行高速总线连接；传统的在一条总线上同时挂载多个设备的模式正逐渐消亡，总线功能已被一个集中式的交换模块取代，而交换模块和各个设备都是通过高速串行点对点的方式进行连接。

Therein, by adopting the ISCSI protocol, the local data storage sub-system constructs the circuital access pattern of the taxation data. The system eliminates the unbalance phenomena between the capability and the demand of the data storage under the traditional bus storage pattern. Under the centralized control pattern, it provides the information access and shares service with the great data volume, the high speed of data transportation and the high availability for the taxation system. By remotely building a backup data center that is totally consistent with the local data center on the IT foundational fabric, the remote data backup sub-system uses the geographical dispersibility of the remote data center and adopts the LVR software replication technology. It implements the synchronous data replication between the local and remote data center, changes the zero standing capability on the great disaster event under the single data center pattern and raises the standing capability on the disaster events for the application and data in the taxation system. By adopting the dynamic replication technology between the heterogeneous data source, the heterogeneous data conformity sub-system successfully shields the various heterogeneous ingredients of the present system.

其中，本地数据存储子系统采用ISCSI协议构建了税务数据网络存储模式，消除了传统总线型存储模式下数据存储性能和存储需求之间的失衡现象，在集控管理模式下为税务系统提供了超大数据容量、高数据传输率和高可用性的信息存取和共享服务；远程数据备份子系统通过在异地构建一个和本地数据中心IT基础架构完全一致的备份数据中心，利用远程数据中心在地理上的分散性，基于LVR软件复制技术实现了本地和远程数据中心之间信息的实时同步，改变了过去单一数据中心模式下对大型灾难事件的零抗灾能力，提高了税务系统内应用和数据对灾难性事件的抵御能力；异构数据整合子系统采用异类数据源动态复制技术，成功屏蔽了目前系统内存在的各项异构成分。

MAX1999EEI Pinout: 8- to 32-bit and 16- to 32-bit word packing options Programmable wait state options: 2 to 31 CCLK Digital audio interface includes six serial ports, two pre- cision clock generators, an input data port, three programmable timers and a signal routing unit Serial ports provide: Six dual data line serial ports that operate at up to 50 Mbits/s for a 200 MHz core on each data line each has a clock, frame sync, and two data lines that can be configured as either a receiver or transmitter pair Left-justified sample pair and I2S support, programmable direction for up to 24 simultaneous receive or transmit channels using two I2S compatible stereo devices per serial port TDM support for telecommunications interfaces including 128 TDM channel support for telephony interfaces such as H.100/H.110 Up to 12 TDM stream support, each with 128 channels per frame Companding selection on a per channel basis in TDM mode Input data port provides an additional input path to the DSP core configurable as either eight channels of I2S or serial data or as seven channels plus a single 20-bit wide syn- chronous parallel data acquisition port Supports receive audio channel data in I2S, left-justified sample pair, or right-justified mode Signal routing unit provides configurable and flexible connections between all DAI components, six serial ports, an input data port, two precision clock generators, three timers, 10 interrupts, six flag inputs, six flag outputs, and 20 SRU I/O pins Serial peripheral interface Master or slave serial boot through SPI Full-duplex operation Master-slave mode multimaster support Open drain outputs Programmable baud rates, clock polarities, and phases 3 Muxed Flag/IRQ lines 1 Muxed Flag/Timer expired line ROM based security features: JTAG access to memory permitted with a 64-bit key Protected memory regions that can be assigned to limit access under program control to sensitive code PLL has a wide variety of software and hardware multi- plier/divider ratios JTAG background telemetry for enhanced emulation features IEEE 1149.1 JTAG standard test access port and on-chip emulation Dual voltage: 3.3 V I/O, 1.2 V core Available in 136-ball BGA and 144-lead LQFP packages Lead free packages are also available

MAX1999EEI引脚说明： 8 - 32位和16 - 32位字包装选择可编程等待状态的选择：2至31个CCLK数字音频接口包括6个串行端口，两个前643时钟发生器，输入数据端口， 3可编程定时器和一个信号路由单元串行端口提供：六双串口数据线，在高达50 Mbps的操作/为200兆赫的每个数据行每个人都有一个时钟，帧同步的核心秒，和两个数据可以作为任何一个接收器或发射器对左对齐和I2S配对样本的支持下，最多可同时接收或传送24个频道，每使用两个系列的I2S兼容立体声设备配置可编程方向线；港口的TDM通信接口，包括支持128个电话接口的TDM的渠道，如H.100/H.110支持多达12个的TDM流的支持下，每帧128个频道每个压缩扩展每通道的基础上选择在TDM模式输入数据端口提供了一个额外的输入路径的DSP核心配置为I2S或串行数据或7加一个20位宽的SYN -异步的并行数据采集接口通道或8通道；支持接收通道I2S音频数据，左对齐样本对，或右对齐模式信号路由单元组件之间提供所有戴配置和灵活的连接，6个串行端口，一个输入数据端口，两个精密时钟发生器，3个定时器，10个中断，六旗投入，产出6个旗，20曼谷南南区域股的I / O管脚串行外设接口的硕士或奴隶通过SPI串行启动全双工运作主从模式多主机支持开漏输出可编程波特率，时钟极性和第三期合并调制旗/ IRQ线路1合并调制旗/定时器过期线光盘的防伪特征：JTAG的访问与64位受保护的关键允许内存内存可分配给程序访问控制的限制下对敏感地区有一个代码锁相环/遥测分比率为背景的JTAG仿真功能增强的IEEE 1149.1 JTAG标准测试访问端口的软件和硬件多钳各种各样和片上仿真双电压：3.3六/输出，可在1.2 V核心136球BGA封装和144引脚LQFP封装无铅封装，也可

TDA4864 Pinout: 8- to 32-bit and 16- to 32-bit word packing options Programmable wait state options: 2 to 31 CCLK Digital audio interface includes six serial ports, two pre- cision clock generators, an input data port, three programmable timers and a signal routing unit Serial ports provide: Six dual data line serial ports that operate at up to 50 Mbits/s for a 200 MHz core on each data line each has a clock, frame sync, and two data lines that can be configured as either a receiver or transmitter pair Left-justified sample pair and I2S support, programmable direction for up to 24 simultaneous receive or transmit channels using two I2S compatible stereo devices per serial port TDM support for telecommunications interfaces including 128 TDM channel support for telephony interfaces such as H.100/H.110 Up to 12 TDM stream support, each with 128 channels per frame Companding selection on a per channel basis in TDM mode Input data port provides an additional input path to the DSP core configurable as either eight channels of I2S or serial data or as seven channels plus a single 20-bit wide syn- chronous parallel data acquisition port Supports receive audio channel data in I2S, left-justified sample pair, or right-justified mode Signal routing unit provides configurable and flexible connections between all DAI components, six serial ports, an input data port, two precision clock generators, three timers, 10 interrupts, six flag inputs, six flag outputs, and 20 SRU I/O pins Serial peripheral interface Master or slave serial boot through SPI Full-duplex operation Master-slave mode multimaster support Open drain outputs Programmable baud rates, clock polarities, and phases 3 Muxed Flag/IRQ lines 1 Muxed Flag/Timer expired line ROM based security features: JTAG access to memory permitted with a 64-bit key Protected memory regions that can be assigned to limit access under program control to sensitive code PLL has a wide variety of software and hardware multi- plier/divider ratios JTAG background telemetry for enhanced emulation features IEEE 1149.1 JTAG standard test access port and on-chip emulation Dual voltage: 3.3 V I/O, 1.2 V core Available in 136-ball BGA and 144-lead LQFP packages Lead free packages are also available

TDA4864引脚说明： 8 - 32位和16 - 32位字包装选择可编程等待状态的选择：2至31个CCLK数字音频接口包括6个串行端口，两个前643时钟发生器，输入数据端口， 3可编程定时器和一个信号路由单元串行端口提供：六双串口数据线，在高达50 Mbps的操作/为200兆赫的每个数据行每个人都有一个时钟，帧同步的核心秒，和两个数据可以作为任何一个接收器或发射器对左对齐和I2S样本对支持，最多可同时接收或传送24个频道，每使用两个系列的I2S兼容立体声设备配置可编程方向线；港口的TDM通信接口，包括支持128个电话接口的TDM的渠道，如H.100/H.110支持多达12个的TDM流的支持下，每帧128个频道每个压缩扩展每通道的基础上选择在TDM模式输入数据端口提供了一个额外的输入路径的DSP核心配置为I2S或串行数据或7加一个20位宽的SYN -异步的并行数据采集接口通道或8通道；支持接收通道I2S音频数据，左对齐样本对，或右对齐模式信号路由单元组件之间提供所有戴配置和灵活的连接，6个串行端口，一个输入数据端口，两个精密时钟发生器，3个定时器，10个中断，六旗投入，产出6个旗，20曼谷南南区域股的I / O管脚串行外设接口的硕士或奴隶通过SPI串行启动全双工运作主从模式多主机支持开漏输出可编程波特率，时钟极性和第三期合并调制旗/ IRQ线路1合并调制旗/定时器过期线光盘的防伪特征：JTAG的访问与64位受保护的关键允许内存内存可分配给程序访问控制的限制下对敏感地区有一个代码锁相环/分比率背景遥测的JTAG仿真功能增强的IEEE 1149.1 JTAG标准测试访问端口软件和硬件多钳各种各样和片上仿真双电压：3.3六/输出，可在1.2 V核心136球BGA封装和144引脚LQFP封装无铅封装，也可

Internal bus is a computer chip inside the external bus between the processor for use in chip-level interconnection; and system bus is the plug-in PC board and the bus between the system board for the interpolation pieces of board-level interconnection; external bus is between the computer and external equipment bus, microcomputer as a device through the bus and other equipment to carry out information and data exchange, and it is used equipment interoperability level even.

内部总线是微机内部各外围芯片与处理器之间的总线，用于芯片一级的互连；而系统总线是微机中各插件板与系统板之间的总线，用于插件板一级的互连；外部总线则是微机和外部设备之间的总线，微机作为一种设备，通过该总线和其他设备进行信息与数据交换，它用于设备一级的互连。

Although translator has turned from being a crystal ball by which the original culture can unrestrainedly penetrate to another crystal ball by which the target culture can freely traverse, the translator's personal embodiment, in the process of cognitive act, are still absent in translation studies. Translators are still subjects without body or simply disembodied subjects.

译者虽然由原语文化可以自由穿透的玻璃球变成了译语文化可以自由穿越的玻璃球，但译者认知过程中的个体体验在翻译研究中依然缺席，译者依然仅仅是一个没有躯体体验的主体。

Chillingly, he claimed our technology is 'not nearly as sophisticated' as theirs and "had they been hostile", he warned 'we would be been gone by now'.

令人毛骨悚然的，他声称我们的技术是'并不那么复杂，像他们一样，和"如果他们敌意"，他警告说，'我们将现在已经过去了。