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comparators相关的网络例句

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与 comparators 相关的网络例句 [注:此内容来源于网络,仅供参考]

Ideal for 3V or 5V single-supply applications, these devices operate from a single +2.5V to +11V supply (or 1.25V to 5.5V dual supplies), and each comparators input voltage ranges from the negative supply rail to within 1.3V of the positive supply.

为3V或5V单电源应用的理想选择,这些器件工作于+2.5 V至+11单电源电压(1.25V至5.5V的或双电源),并在为1.3V从负供电轨每个比较器输入电压范围的正电源。

The ADC is pipelined, including a single-input/difference-output sample/hold circuit and nine stage subcircuits. The preceding eight stages are 1.5bits/stage, and the last stage consists of two comparators. Every input sample is converted into 18 bits binary signals, and these binary signals are converted into 10 bits binary signals through digital correction circuit.

模数转换电路采用流水线式的结构,包括具有单端输入/差动输出功能的采样保持电路和九级的子电路,前八级子电路使用1.5位/级的结构,最后一级使用两个比较器实现,每个输入值被转换为18位的二进制代码,通过数字纠正技术最终实现10位的输出,按照前端电路的应用要求,这个模数转换器实现1.33MHz的采样速率。

In this mode, the internal voltage reference is applied to the VIN+ pin of both comparators.

在这种模式下,内反射参考电压适用于所有比较器的VIN+引脚。

In order to improve the speed of whole ADC and largely reduce the numbers of comparators, a type of high speed voltage comparator is designed.

设计了一种高速的电压比较器来提高整个转换器的速度,并且大大降低了比较器的数目。

Zenith telescopes, spectrographic instruments and attachments, micrometers, photometers, comparators, coelostats of at least up to 65 cm diameter, and sundials of up to at least 90cm diameter rounded out the product line.

还有大到65 cm物镜直径的天顶仪、摄谱仪及配件、测微计、光度测定器、测远仪、定天镜(注:观测或拍摄天体时镜面与地轴一同转动可使图像固定不动),大到90 cm物镜直径的日昝仪都出现在蔡司的生产线上。

Both comparators are "off" with the total device current due only to reverse junction leakages.

两个运放都断开,同时所有器件的电流取决于漏级反向结电流。

Based on multi-stage comparison, a new theory incorporating Minimum Comparator Number Algorithm and Power-Conversion Rate Merit Model is proposed, which releases the power dissipation from limitation of comparators, sub-DACs and residual amplifiers in high-speed high-resolution ADCs.

摘要该文依据多级比较原理,建立了ADC功耗-速率优值模型。基于比较器数目最优算法,推导出多级ADC最优比较器数目,并提出多级ADC功耗-速率优值参数,从而得到可实现小功耗、高转换速率的多级ADC优化结构。

The effect of the hysteresis wide of power hysteresis comparators on the properties of the PWM rectifiers was discussed.

讨论了功率滞环比较器环宽对PWM整流器的影响。

The results show that the proposed comparators are of correct logic function.

结果表明,所设计的电路具有正确的逻辑功能。

Compared with traditional comparators, this one shows significant improvement in area, power, and speed.

与传统的比较器相比,该比较器较好地兼顾了面积、功耗以及速度等方面,在这些方面有了较大的改进。

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