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combinational algorithm相关的网络例句

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To improve the speed and efficiency of combinational logic circuit design, this paper presented a Game Genetic Algorithm.

为了有效提高组合逻辑电路进化设计的速度和效率,提出了一种基于博弈遗传算法的电路进化设计算法。

MUX is a multi-input, single-output combinational logic circuit, in the algorithm used in the realization of circuits to address code in accordance with scheduling data.

详细说明:多路选择器是一个多输入,单输出的组合逻辑电路,在算法电路的实现中常用来根据地址码来调度数据。

Based on this, the algorithm by which the complete test sets for combinational circuits can be genera...

显然,本文提出的方法具有更多的优点。

The algorithm of combinational equivalence checking has become mature. But it is the basic of sequential equivalence checking.

组合电路的等价验证算法目前已发展比较成熟,但它是时序电路等价验证的基础。

Based on a Hopfield neural network mode for combinational circuit test generation, a test generation algorithm with global searching ability is proposed. This algorithm is the combination of chaotic searching with gradient algorithm. By means of the inherent stochastic and ergodic property of chaotic searching, the problem of being trapped in local minimum of gradient algorithm can be solved.

基于组合电路测试生成的离散Hopfield神经网络模型,将混沌搜索与Hopfield网络的梯度算法相结合,利用混沌搜索的内随机性及遍历性来克服梯度算法易于陷于局部极小的缺点,形成一种具有全局搜索能力的测试生成有效算法。

The cause of the target fade-out in Neural Network nonuniformity correction scheme for infrared focal plane arraywas studied. Based on analyzing the strength and limitation of edge-directed NN scheme and nonuniformity correction combining one-point calibration and NN-NUC, a new combinational algorithm for nonuniformity correction was proposed.

中文摘要:分析了传统神经网络非均匀性校正算法在空域处理过程中产生目标退化的原因,在总结基于边缘指导的神经网络校正算法与一点定标和神经网络结合的校正算法的基础上,提出了新的组合校正算法。

Since the model is a large scale and NP-hard combinational optimization problem in the real navigation environment, a hybrid simulated annealing algorithm is employed to search the suboptimal solution composed of a lockage timetable and a ship scheduling, The search starts by trimming the existing lockage timetable based on heuristic rules; the result is then used to compute the ship scheduling by the depth-first-search algorithm. The obtained solution is finally updated by the Metropolis rule.

本文首先提出了该问题的混合整数非线性规划模型,在实际通航调度环境中,该模型属于强NP-hard复杂度的大规模组合优化问题,因此设计了一种混合模拟退火算法来搜索次优化调度方案,该算法将解分解为闸次时间表和船舶调度计划两部分,在搜索过程中用启发式规则对闸次时间表进行调整,然后用深度优先搜索算法根据闸次时间表求解船舶调度计划,最后根据Metropolis规则对当前解进行更新。

Some methods aiming at the two problems have been researched. First, the optimal number of ATE site can be calculated based on a cost model of DAT-ATE. Second, the problem of test schedule which is equitant with two-dimensional Bin-Packing problem is presented. Then a TCG denotation satisfied with T-admissible rule is more convenient for combinational optimization. With Simulated annealing algorithm, better test scheduling results can be achieved; but there is no great optimization space because the efficiency of scheduling is greater than 90%. Third, A novel test compression method——Multi-capture testing is proposed to compress the stimuli. And the ATPG results show that MC achieves high compression ratio which is greater than 90% in some large-scale circuits. MISR, widely used in LBIST, is employed to compress the responses. The aliasing analysis demonstrates that the fault coverage reduction is little due to the existence of aliasing. Fourth, an improved TIC (called S-TIC) aiming at structured test is proposed based on ARM's TIC. A MC scheduling algorithm is proposed to compute the SoC test time and combine MC vectors to SoC test vectors. The scheduling results shows that test time is greatly reduced when using the proper scheduling priority.

首先,给出了低成本ATE的成本模型,根据此模型得到最低测试成本时系统级测试调度的基本参数——测试Site数;其次,本文将DAT-Scan方式的SoC测试调度等价为两维BP问题,为有效地求解该问题,将该BP问题表示为TCG图并通过模拟退火算法解决其求解过于复杂的问题,调度的结果表明该方法在测试时间上有一定改善,并指出DAT-Scan测试调度效率已经大于90%,进一步优化的空间较小;第三,本文尝试通过测试压缩来解决激励所需的测试带宽,提出了Multi-capture结构并解决了MC测试过程中的&矢量&退化问题,MC测试的ATPG结果表明其测试压缩率很高(大电路接近90%);第四,在激励获得很高压缩比的情况下,测试响应也需压缩,本文采用LBIST中常用的MISR作为MC测试的响应压缩电路,理论分析和实验结果都证明了MC测试的别名对故障覆盖率影响较小(小于2%),并对两类别名的成因做了具体分析;第五,在MC测试及其响应压缩的基础上,本文改进了ARM公司的测试控制器TIC使之适合于MC测试,为了解决MC测试矢量合成问题,本文抽取了MC测试模型,通过固定优先级的MC测试调度模拟将MC矢量合成为ATE矢量,并模拟出了总的MC测试时间。

This paper proposes a new algorithm of retiming which can be combined well with other combinational optimization methods to speed up logic circuits.

文中提出了一种改进时序重排算法,使时序重排可以更有效地与其它组合优化算法结合起来,共同提高同步时序电路的速度。

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你知道吗,我需要你回来

Yang yinshu、Wang xiangsheng、Li decang,The first discovery of haemaphysalis conicinna.

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Chapter Three: Type classification of DE structure in Sino-Tibetan languages.

第三章汉藏语&的&字结构的类型划分。