查询词典 clock rate

The frame rate of video and warp of audio PCM clock frequency are discussed at last.

最后，对视频帧率和音频PCM时钟的偏差等问题作了进一步的探讨。

In the fourth chapter, firstly it introduces the Boolean functions algebraic expressions of the 2-value clock-controlled stop-and-go generator and Gunther generator. It reveals the balanced property of the two kinds of Boolean functions, and studies the Walsh cycle spectrum and the autocorrelation function. It also obtains the coincidence rate of their output sequences with affine sum of some bits of input sequences, and analyzes their ability of resisting the best affine approximation cryptanalysis and differential cryptanalysis. Secondly, we properly present a new definition of the Best Affine Approximation, namely BAA on the Boolean vector functions, followed by the spectral characteristic of such defined BAA attacks through using the decomposition formula of the union distribution for random variables. A lower bound of such BAA attacks is proposed. Finally, we also study the spectral characteristic of the second kind of nonlinearity of Boolean vector functions, followed by a higher bound of such nonlinearity. Furthermore, the limited relationship between the second kind of nonlinearity of Boolean vector functions and the linear structure of the linear combination of every component is analyzed.

在第四章中，首先给出了2值密钥流"停走生成器"和"衮特生成器"中实际存在的布尔函数的代数表示，揭示了这两类布尔函数的平衡性，随后研究了它们的Walsh循环谱和自相关函数等，得到了它们的输出序列与输入序列中的某些bit的仿射项的符合率，分析了它们抵抗最佳仿射逼近攻击和差分攻击的能力；其次，我们合理地给出了布尔向量函数最佳仿射逼近的新定义，利用布尔随机变量联合分布的分解式考察了相应的谱特征，并给出了布尔向量函数与其最佳仿射逼近的符合率的一个下界；最后，我们还考察了布尔向量函数第二类非线性度的谱特征，给出了布尔向量函数第二类非线性度的一个上界，并揭示了布尔向量函数第二类非线性度与其各个分量的线性和的线性结构之间存在的制约关系。

Modern processors canoften execute at a rate of two instructions per clock cycle.

速度的改进直接取决于芯片上所集成的晶体管的数量。

In addition, under optimal conditions, the processor core can sustain an execution rate of one instruction per clock cycle.

在最佳的条件下，i486的核心可以提供一个时间周期内处理一个指令。

I'll be here till gone 2 o'clock at this rate .

照这个速度，我至少要等到2点。

Please also notice that because there is no reference clock, the frame rate

还请注意，因为没有参考时钟，帧速率

Experimental results show that under prerequisite of accuracy and complexity, the method improves the operating clock and processing rate.

实验结果表明，该方法在保证运算精度和实现复杂度的同时，提高了处理器的数据时钟频率和处理速度。

LT3468ES5-1 Pinout: 8-bit Resolution 1 Gsps Sampling Rate ADC Gain Adjust 2 GHz Full Power Input Bandwidth Fs = 1 Gsps, Fin = 20 MHz: C SINAD = 45 dB (7.4 Effective Bits) SFDR = 58 dBc Fs = 1 Gsps, Fin = 500 MHz: C SINAD = 44 dB (7.2 Effective Bits) SFDR = 56 dBc Fs = 1 Gsps, Fin = 1000 MHz (-3 dB Fs): C SINAD = 42 dB (7.0 Effective Bits) SFDR = 52 dBc 2 Tone IMD:-53 dBc (489 MHz and 490 MHz) at 1 Gsps DNL = 0.3 LSB INL = 0.7 LSB Low Bit Error Rate (10-13) at 1 Gsps Very Low Input Capacitance: 0.4 pF 500 mVpp Differential or Single-ended Analog Inputs Differential or Single-ended 50 ECL Compatible Clock Inputs ECL or LVDS/HSTL Output Compatibility Data Ready Output with Asynchronous Reset Gray or Binary Selectable Output Data; NRZ Output Mode Power Consumption: 3.4 W at TJ = 90 C Dual Power Supply: 5 V Radiation Tolerance Oriented Design 150 Krad (Si Measured

LT3468ES5-1引脚说明： 8位分辨率1 GSPS的采样速率ADC的增益调整2 GHz的全功率输入带宽= 1 GSPS的二恶英，翅= 20兆赫中：C的SINAD = 45分贝（7.4有效位）的SFDR = 58 dBc的二恶英= 1 GSP的，财务= 500兆赫中：C的SINAD = 44分贝（7.2有效位）的SFDR = 56 = 1 GSPS的dBc的外勤人员，财务= 1000兆赫（-3分贝财经事务）中：C的SINAD = 42分贝（7.0有效位）的SFDR = 52 dBc的2声调发展学院：-53 dBc的（489兆赫和1 GSPS的的DNL = 0.3的LSB的INL = 0.7 LSB的低误码率（10-13）在1 GSPS的非常低输入电容：0.4 pF的490兆赫）500 mVpp的差分或单端模拟输入差分或单端50Ω的ECL兼容的时钟输入的ECL或LVDS / HSTL输出兼容性数据与异步复位灰色或二进制可选的输出数据就绪输出； NRZ码输出模式下的功耗：3.4 W于温度Tj = 90 C双电源：5伏辐射性导向设计

A flexible buffer was placed between the over-sampler and DPLL.Not only was 10bits data recovery implemented,but also the frequency of sampling clock was reduced to 2.5 times of the data frequency.The phase verification for 10bit parallel data by DPLL increases the accuracy rate of judgment and improves the bit error rate.

通过在过采样电路和数字锁相环之间增加弹性缓冲电路，在实现10bit数据恢复的同时，使采样时钟频率减小为数据频率的2.5倍，DPLL同时对10bit并行的数据进行相位检测判断，提高了判断的正确率，使数据传输的误码率得到改善。

The crosstalk reducing unit (14) has a sample rate converter (19) coupled to a synchronous clock for converting the output of the subtractor to the data signal (8) at a synchronous sample rate.

所述串扰降低单元(14)具有与同步时钟耦合的采样率转换器(19)，用于以同步采样率把所述减法器的输出转换为数据信号(8)。

In this section we look at the theory behind the techniques used in rotary polishing and the effects that they have on paintwork and the results achieved.

在这里看抛光剂使用背后的理论，到底是怎么一回事，我们如何用好的抛光机和好的使用技巧来达到好的效果。

I'll dig like a psychotic rodent if I have to.

那我就帮你挖到中国去。