查询词典 clock frequency

This processor works at the clock frequency 3,0 GHz, and its TDP is 125 W.

这一工程的处理器在时钟频率3，0千兆赫，其加TDP是125瓦特

Officially supported bus are only 1333 MHz , but the BIOS Clock frequency generator can goup to 800 MHz.

官方支持巴则只有第1333兆赫，但BIOS的时钟频率发生器可以高达800兆赫。

This granularity is fine enough for all applications because it is quicker than the hardware clock frequency.

这是精细粒度为所有应用是足够的，因为它比硬件时钟频率更快。

This will allow NVIDIA to raise the maximum clock frequency of memory from present 1800 MHz to 2200 MHz.

这将使NVIDIA的提高，最高的时钟频率的内存，从目前的1800兆赫到2200兆赫。

A topdown design of an 8bit RISC MCU is presented, in order to overcome the limitation of MCS51 microcontroller The core is based on Harvard architecture with 16bit instruction length and 8bit data length The performance of the MCU has been greatly improved by introducing singleclockcycle instructions, setting multiple highspeed working registers, replacing microprogram with direct logic block, etc FPGA verification and computer simulation show that its maximum clock frequency and instruction e...

在对传统的MCS51系列单片微控制器的局限性进行分析的基础上，设计了一种基于增强8位RISC构架的微控制器内核。该MCU核采用哈佛结构、16位指令字长和8位数据字长，通过设计单周期指令、在内部设置多个快速寄存器及采用硬布线逻辑代替微程序控制的方法，加快了微处理器的速度，提高了指令的执行效率。计算机仿真验证和FPGA仿真验证的结果表明，该MCU的最高时钟频率和指令执行效率等指标均优于MCS51的5倍以上。

A single-loop 5-order 1-bit quantization structure is chosen along with OSR of 64, first sampling capacitor of 6pF, clock frequency of 128MHz to achieve 16-bit resolution and 1MHz base-bandwidth.

在系统设计方面，选用前馈结构，它有助于实现调制器的稳定和降低第一级积分器的线性设计要求；同时通过系数调整把第一级积分器的摆幅降下来，有利于低电压运放的设计。

The prime cost of one gate as a result of applying the 65- nm technical process is reduced by 20% in comparison with 90 nm cyclone II, and clock frequency of memory and coefficients is increased from 216 to 260 MHz.

总理的成本一门作为一个结果，运用65 -纳米技术的过程中减少了2 0％，在比较与9 0奈米的C ycloneI I，和时钟频率的内存和系数增加，从2 16到2 60兆赫。

The power consumption can be reduced by using low power MPU,reasonable power supply,proper clock frequency and low power software.

同时，采用低功耗微电子芯片、合理的供电方式、时钟频率和软件低功耗等措施充分降低总功耗。

This kind of technology inmicroprocessor unusual remarkableness, uses for to help the promotionnowadays the processor clock frequency.

这种技术在微处理器中非常的显著，用来帮助提升现今处理器的时钟频率。

998 Logic elements are used to construct the structure of scalar multiplication,and it takes 567.69us to multiply in the clock frequency of 100MHz.

改进后的椭圆曲线标量乘法需要2，741，998个逻辑单元，在100MHz的时钟约束下，运行一次标量乘法运算需要567.69us。

As she looked at Warrington's manly face, and dark, melancholy eyes, she had settled in her mind that he must have been the victim of an unhappy attachment.

每逢看到沃林顿那刚毅的脸，那乌黑、忧郁的眼睛，她便会相信，他一定作过不幸的爱情的受害者。

Maybe they'll disappear into a pothole.

也许他们将在壶穴里消失