查询词典 clock cycle

Can be started in every clock cycle.

管道线的优点是，尽管完成一个加法花费 5 个周期，但是在每个时钟周期都可以开始一个新的加法。

Modern processors canoften execute at a rate of two instructions per clock cycle.

速度的改进直接取决于芯片上所集成的晶体管的数量。

In addition, under optimal conditions, the processor core can sustain an execution rate of one instruction per clock cycle.

在最佳的条件下，i486的核心可以提供一个时间周期内处理一个指令。

During this clock cycle, the microprocessor reads the data off the system bus and stores it in one of its registers.

在这个时钟周期之内，微处理器从系统总线上读取数据，并存储到它的某个寄存器中。

Wait state A microprocessor clock cycle in which nothing occurs .

等待状态微处理器不执行任何动作的时钟周期。

This is because the bandwidth required for a lot of time, CPU can only wait until the next clock cycle will be needed, because memory could not keep pace with CPU frequency.

这是由于当对带宽的需求很大的时候，CPU只能够等待下一个时钟周期才能够得到所需要的数据，因为内存的速度跟不上CPU的频率。

It demonstrates that the linear assembly code has a notable increase of the clock cycle efficiency, and the optimization is obvious.

优化后的数据显示，线性汇编代码在时钟周期上效率大幅提高，优化效果相当明显。

Superscalar refers to a clock cycle of a CPU can execute instructions above.

8超标量是指在一个时钟周期内CPU可以执行一条以上的指令。

The resulting system 1 maintains or improves CPU utilization rates as CPU speeds increase, 2 provides large level 1 caches while maintaining cache access times of one CPU clock cycle, and 3 provides high CPU utilization rates for those processing applications where locality of memory references is poor (e.g., networking applications).

随着CPU速度的提高，能够保持或提高CPU的利用率，2）提供大容量一级高速缓存，并同时保持高速缓存的存取时间为一个CPU时钟周期，3）为那些存储器引用局部性不强的处理系统提供高的CPU利用率。

A set of edge-triggered latches which jointly store the state of a binary value through a clock cycle is termed a register.

用一组沿触发锁存器在一个时钟周期内共同地存储一个以二进制数表示的状态，就称为寄存器。

As she looked at Warrington's manly face, and dark, melancholy eyes, she had settled in her mind that he must have been the victim of an unhappy attachment.

每逢看到沃林顿那刚毅的脸，那乌黑、忧郁的眼睛，她便会相信，他一定作过不幸的爱情的受害者。

Maybe they'll disappear into a pothole.

也许他们将在壶穴里消失