查询词典 breakdown voltage
- 与 breakdown voltage 相关的网络例句 [注:此内容来源于网络,仅供参考]
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The system breakdown voltage measurement and signal output two most voltage measurement part in the main circuit simulation, tie amplifier module, A / D conversion module, module; Sunplus microprocessor through data processing, in the range of allowable error voltage measurements show, and broadcast voice.
本系统分电压测量和信号产生输出两大部分,电压测量部分以模拟电路为主,配合放大模块、A/D转化模块、显示模块;通过凌阳单片机进行数据处理,在误差允许范围内显示测量电压值,并播报语音。
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The invention relates to an ESD protector which comprises the first well and the second well inside the semi-conductor liner, while a separating area is between them; the N pour area is inside the second well, to couple the first node; the NLDD area is between the N pour areas, and annularly poured under the NLDD areas; when the voltage of first node is higher than the breakdown voltage, the current discharge path is limited by the NLDD area and annular pour; said breakdown voltage is lower than the breakdown voltage of oxide of logic gate.
本发明提供了ESD保护技术。一种ESD保护器件包括设置在半导体衬底中的第一阱区和第二阱区,并且隔离区位于中间。N 注入区被设置在第二阱区中,并且在第一节点处耦合在一起。NLDD区被设置在N 注入区之间,并且环形注入位于每个NLDD区之下。当第一节点的电压超过击穿电压时,电流放电路径由对应的NLDD区和环形注入所限定。在一个具体实施例中,所述击穿电压小于逻辑门氧化物的击穿电压。
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During the high-voltage device design, the thick epitaxial layer LDMOS which is compatible with current technology was researched. This device used piecewise VLD and multiple region structure F reduce field layer. The using of the F reduce field layer effectively reduce the surface electric field of the device, shorten the length of its drift region, enlarge the choice of range of the ion implant dose of the P layer, and effectively restrain the disadvantageously affection on the breakdown voltage of the interface charge Qss.
在高压器件研究中对与现有工艺相兼容厚外延LDMOS进行研究,该结构采用分段变掺杂多区P~-降场层,有效降低器件的表面电场,缩短器件的漂移区长度,增大P~-降场层注入剂量的选择范围,并有效地抑制界面电荷Qss对器件耐压的不利影响。
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Then the breakdown mechanism was introduced to explain the results.It is found that the optimum polarity combination is heteropolarity and the best scope of the ratio between trigger voltage and self-breakdown voltage is 30%~50%.
实验结果表明:新型触发管开关获得最佳触发特性所需的极性组合应为异极性组合,触发电压幅值范围为自击穿电压的30%~50%,为兼顾触发电流和保护触发器,触发电阻值应为50~100 Ω,验证了触发管开关击穿机制的已有认识。
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In reality, we fabricate the metal field plate termination structure and its breakdown voltage is 300 V. After adding poly resistor, the breakdown voltage of the termination structure is 2000V and leakage current is in microampere.
实际制作出的单一金属场板终端结构可耐压约300伏特,加入了复晶矽电阻,耐压可提升至2000伏特,漏电流约在微安培等级。
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The anode structure of CI-LIGBT is optimized by numerical simulation, and it is pointed out that segmented p〓 anode region surrounded by n〓 anode region is the key to improve the ability of current limiting, and the more deeper the n〓 anode junction relative to the p〓 anode junction, the more powerful the ability of current limiting is. The affection of the breakdown voltage BV〓 of the reverse biased p〓n〓 junction and the sample resistance upon the latching current, the latching voltage and the on-state voltage have been studied, and it is indicated that the tradeoff between the on-state voltage and the latching characteristics is the excellentest when BV〓 is 1. 1V so that its on-state voltage can be just only 0.6V higher than conventional LIGBT. It is also found that this device is especially suit to high temperature environment. Based on X. B. Chen's surface voltage sustaining structure using optimized variational lateral doping and Ludikhuize's multiple floating rings structure, high voltage LIGBT and is studied in this paper.
通过数值模拟,优化了CI-LIGBT的阳极区结构,指出采用被n〓阳极区包围的单元状p〓阳极区是提高该器件限流能力的关键,而n〓阳极区结深相对p〓阳极区结深越大,器件的限流能力越强;分析了反偏p〓n〓结击穿电压BV〓和取样电阻对器件闩锁电压、闩锁电流和导通压降的影响,得出BV〓在1.1V时器件导通压降和抗闩锁能力间的折衷关系最优,其导通压降仅比普通LIGBT高0.6V;分析了温度对LIGBT闩锁性能的影响,表明CI-LIGBT即使在450K的高温下也不会闩锁,尤其适用于高温工作环境。
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The results shows that the probability distribution of discharge striking points is related to the breakdown voltage,breakdown time and the development of head-on discharge, it is influenced by geometric shape of object, ground resistance, and geometric striking distance.
结果表明,放电击中点的概率分布与上电极对各目的物的击穿电压、击穿时间和迎面放电的发展有关,受目的物几何形状、接地电阻和几何击距等因素的影响。
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The influence of impulse voltage waveshape on particle-initiated breakdown voltage of a GIS system in SF6 and SF6/Air mixtures is reported. The results are compared with the characteristics of air gaps. For the SF6 gaps, breakdown voltage depends on wave-front duration but almost independs on wavetail duration. For the gaps in SF6/Air mixtures, the influence of impulse waveshape also depends on SF6 contents and electrical field non-uniformity
作者研究比较了正极性冲击电压波形对SF_6、空气、SF_6/空气的 GIS 电极装置由固定导电微粒引发的击穿电压的影响,结果表明:SF_6间隙的击穿电压受冲击电压波前时间长短的影响较大,而与波长的关系不大,当采用SF_6/空气混合气体时,则这种影响随SF_6含量增大而愈明显,并与电场不均匀程度有关。
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This paper presents conductive polymer molecular materials with insulating powder, mixed into the deployment of surge suppressors for low capacitance of paste, while the component design concept is based on the field of passive components, manufacturing process to make the basic theory to design the protective components, the main use of the existing ceramic substrate for the component body structure design, screen design in the body through the structure of the gap at the top of the printing layer of a different conductors, and then to learning to know the printing process technologies approach the low capacitance of the surge suppressor paste cover the gap in the two conductors, and by the resistance of plastic burning process technology, the temperature of sintering parts made of electrostatic protection element, and this protection through the external ESD components in bombardment tests, measurement of capacitance electrostatic discharge after bombardment, Trigger voltage and leakage current data, and the volume measured by the results of future discussion of the layout of this different style of work in the same area, different clearance, solid content and temperature than the next, for the attainment of performance components, a low capacitance ESD protection devices with low breakdown voltage requirements and to chip-based protection devices can be designed to integrate with the advanced Integrated Circuits or used independent of the electrostatic protection element in the system.
本文提出高分子导电分子材料搭配绝缘粉末,调配混合成适用於低电容突波抑制器之PASTE,而元件设计概念是以被动元件制程领域作基础理论去设计此防护元件,主体利用现有陶瓷基板为元件本体结构设计,在经由网版设计在本体结构上方印刷一层不同的间隙导体,再以习知印刷制程技术方式,将低电容突波抑制器之PASTE覆盖在两导体的间隙内,并经由电阻制程习知塑烧技术,将元件烧结适当温度制成静电防护元件;而此防护元件在经外加静电放电轰击测试后,量测静电放电轰击后的电容、Trigger voltage及漏电流相关数据,并藉由测结果讨此同的布局样式,在相同工作区面积、不同间隙、固含量与温度比下,对於元件效能是否达到静电防护元件低电容与低崩溃电压的需求,并藉此晶片型防护元件可设计整合於先进积体电或应用於独系统的静电防护元件中。
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Have discussed liquid dielectric breakdown theory and sundry factors influencing liquid dielectric breakdown voltage, and put forward electric spark discharge model.
论述了液体电介质的击穿理论,分析了各种因素对液体电介质击穿电压的影响,提出了电火花放电模型。
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