查询词典 adders

At last, optical half /full adders based on single SOA and several optical bandpass filter are theoretically proposed.

最后从理论上提出了基于单个SOA和若干个并联的滤波器组合的全光半加器和全加器。

The address calculating circuit is very simple and consists of three adders and pq 4:1multiplexers,which calculates pq addresses for the pq memory modules in parallel.

其地址计算电路极其简单，仅含3个加法器和pq个4：1多路器，能够同时为pq个存储模块计算地址；数据分布电路只有一个，用来完成读出和写入时数据在数据寄存器和存储模块之间的分布。

As an example, in the design of a 4-bit ripple carry adder, the second and fourth full adders do not use output inverters for carry generation. one inverter delay is eliminated for every two full adders in the adder chain, and four transistors are reduced. Similarly, in complex designs like the multiplier, the output inverters for generating sum and carry can be used in alternative stages, thereby improving speed and reducing area.

例如，在4位行波进位加法器中，第2级和第4级的加法器不需要用输出反向器进行进位产生，因此，加法器链上的反向器延迟每两级全加器抵消一次，因此可以减少4个晶体管，类似的，在乘法器这样的复杂设计中，用于产生"和"以及"进位"的输出反向器可以用于其它方面，因此可以改善电路的速度和减小面积。

The modification was nearly negligible in which the full adder cells are substituted by cells termed modified full adder and such design has not any additional critical paths inside the adders.

该设计改动微乎其微，通过将原有加法单元替换为一种改进的加法单元，对加法器原有关键通路无任何额外的时延影响。

In practice, fast adders such as CLA adder is always used in the last stage of CSA array multiplier to increase its speed.

在实际电路中，为了提高乘法的速度，CSA（Carry-SaveAdder）阵列乘法器的最后一级常采用CLA加法器等快速加法器。

Wallace trees are the theoretically fastest multi operand adders, which can be used for obtaining the sum of partial products.

理论上 Wallace树结构加法器是乘法器中完成部分积求和的最快的多操作数加法器，但其互连复杂难于实现。

With circumspection, as invariably when entering an abode: with solicitude, the snakespiral springs of the mattress being old, the brass quoits and pendent viper radii loose and tremulous under stress and strain: prudently, as entering a lair or ambush of lust or adders: lightly, the less to disturb: reverently, the bed of conception and of birth, of consummation of marriage and of breach of marriage, of sleep and of death.

645谨慎地，就像每一次进入一座房子（他自己的或并非他自己的）的时候那样，小心翼翼地，因为床垫子那蛇状螺旋弹簧已经陈旧了，黄铜环和蝰蛇状拱形挡头也松松垮垮的，一用力过头就颤悠；顾虑周到地，就好像进入肉欲或毒蛇的巢穴或隐身之处似的；轻轻地，省得惊动她；虔诚地，因为那是妊娠与分娩之床，合卺与失贞之床，睡眠与死亡之床。

In the earlier work D. Husinga developed a Matlab computer program that traded adders for delays, optimized scaling and used Canonic Sign Digit techniques to reduce hardware requirements for fixedcoefficient FIR filters .

在先前的工作4 Husinga开发了基于Matlab的计算机程序交易加法器的延迟，优化调整和使用法服注册位数技术，以减少硬件要求fixedcoefficient FIR滤波器。

Comb filter was adopted as the first stage filter. Adders and subtracter were used to implement it.

梳状滤波器用作多级抽取的首级，使用全加器和全减器实现。

Because of the requirements for high speed and high precision in adders,redundant signed digit number adders are proposed.

冗余符号数加法器满足了对加法器高速度和高精度的要求。

This one mode pays close attention to network credence foundation of the businessman very much.

这一模式非常关注商人的网络信用基础。

Cell morphology of bacterial ghost of Pasteurella multocida was observed by scanning electron microscopy and inactivation ratio was estimated by CFU analysi.

扫描电镜观察多杀性巴氏杆菌细菌幽灵和菌落形成单位评价遗传灭活率。