查询词典 adder-wort

By a decaying stump he saw the puff adder, though it was almost indistinguishable from the flakes of old bark, thickened inside a widened cleft of the wood.

在一个烂树墩旁，他看见了鼓腹毒蛇，尽管在那些老树皮的鳞片中几乎认不出它，它深藏在那片木头中宽大的裂缝中。

Absa had requested the restraining order against Jan Abel Manamela, who released five poisonous Puff adder snakes at the bank's Johannesburg headquarters in 2004, the South African Press Association said.

据路透社4月12日援引南非新闻联合社的报道说，此前，南非最大的Absa银行请求法庭禁止这个名叫马纳梅拉的顾客再次进入其内。2004年的一天，马纳梅拉曾携带5条有毒的猪鼻蛇进入位于约翰内斯堡的这家银行总行，并将它们放了出来咬人。

Parallel processing characteristic of the Residue Number System is display a high "area × power × delay" performance in VLSI. Modulo adder is one of the basic units in RNS, meanwhile, its performance has decided the performance optimization of the Residue Number System.

余数系统中的并行处理特性在VLSI系统中表现了很好的"面积×功耗×时延"特性，而模加法器作为构建RNS系统的基本单元之一，其性能决定了余数系统的性能优化。

A fowler went into the woods to shoot a Ringdove with his bow and arrow,when an adder that he had trodden upon in the grass, urned and stung him.

一位捕鸟人带着弓箭到森林里去捕斑鸠。他踩着了草中的一条蝮蛇，蝮蛇便转过身来咬了他。

Chapter 6 studies the design of the adder for IEEE standard 754 single precision floating-point number format.

第6章讨论了针对符合IEEE 754标准的单精度浮点数的浮点加法器的设计。

A lot of excellent circuits can be quickly and easily designed by using of Multisim2001. This thesis designed digital answer bell, digital frequency meter, up-down-counter, adder- subtracter .

本文利用Multisim2001在数字电路方面的仿真能力，设计出了数字式抢答器、数字频率计、正序倒序计数器、个位数的加法减法器。

Graph 1 capacitor C is right simplifying amplifier circuit undertake communicating going Ou; Detailed circuit use level of a few gain and an adder, subtracter class.

式中AD(1-4)分袂是放大器A1到A4的差动增益，ACM(1-4)分袂是这四个放大器的共模增益，AD5是放大器A5的差动增益，ACM5则是A5的共模增益。Δ是电路中电阻器R4的容限。

The water switches in induction voltage adder are designed. The electrode of output switch is plate to annular and the electrode of peaking switch is annular.

设计了应用于感应电压叠加器中的水介质主开关与峰化开关，主开关的电极结构为"平板-环型"，峰化开关的电极结构为"环型"。

Floating-point adder and multiplier are used to design and implement the voice coil motor simulation system.

在FPGA中，采用浮点数加法器和乘法器设计并实现了音圈电机仿真系统。

Combining with the design of a 32-bit adder loop, the key techniques of this methodology are introduced, such as selection and design of dynamic circuits, clock design, delayed precharge, dual-mode circuits, and noise control method.

本文以600MHz YHFT-DSP/MHM数据通路的设计为背景，从关键电路和EDA技术两个方面入手，对高性能DSP的电路设计技术进行了深入研究，并取得了以下成果：1。

The split between the two groups can hardly be papered over.

这两个团体间的分歧难以掩饰。

This approach not only encourages a greater number of responses, but minimizes the likelihood of stale groupthink.

这种做法不仅鼓励了更多的反应，而且减少跟风的可能性。