查询词典 SRAM

The fully programmable Blackfin BF533 16/32-bit core is capable of operating at up to 756 MHz/1512 MMACS and has up to 148kB of on-chip SRAM memory.

完全可编程的 Blackfin BF533 16/32位内核的工作频率最高可达756MHz/1512MMACS，片上 SRAM 内存容量最高可达148kB。

In the context of a computer system, cache memory generally is a partition of SRAM.

再计算机系统中，高速缓冲存储器通常是 SRAM的一部分。

The cycle time and access time of a SRAM are almost the same.

周期和通路一个 SRAM 的时候几乎是相同的。

Because of this refresh requirement, it is a dynamic memory as opposed to SRAM and other static memory.

因为这个刷新规定，它是一个动态存储器作为反对sram和其他静态存储器。

In information processing, especially realtime video image processing usually have to deal with video images, which must first be designed largecapacity memory, synchronous dynamic random access memory SDRAM Although there are low cost, large capacity, etc., but SDRAM control structure of the complex, commonly used method is to design generic SDRAM controller, which makes a lot of people had to abandon the use of SDRAM and the use of expensive SRAM.

在信息处理中，特别是实时视频图像处理中，通常都要对实现视频图像进行处理，而这首先必须设计大容量的存储器，同步动态随机存储器SDRAM虽然有价格低廉、容量大等优点，但因SDRAM的控制结构复杂，常用的方法是设计SDRAM通用控制器，这使得很多人不得不放弃使用SDRAM而使用价格昂贵的SRAM。

At present the company mainly engaged in: ISSI, CATALYST, SIPEX, SST, RICOH, MICROCHIP, AMD, MAXIM, TI brand-name manufacturers such as SRAM, DRAM, SDRAM, EEPROM, MCU Singlechip, FLASH, and interface circuits, power management, protection of electricity, such as lithium related to integrated circuits.

目前公司主要经营：ISSI、CATALYST、SIPEX、SST、RICOH、MICROCHIP、AMD、MAXIM、TI等名牌厂商的SRAM、DRAM、SDRAM、EEPROM、MCU单片机、FLASH以及接口电路、电源管理、锂电保护等相关集成电路。

This document is C8051 MCU external SRAM literacy test procedures using serial observation test results use of e...

摘 要：本文件是C8051单片机外部SRAM读写测试程序使用串口观测测试结果，使用外部22.1184MHz晶振。

It is because the spending of area and power of the SRAM memory cell takes a lot of percentage of the whole macro modules'. Using the α exponent MOSFET model to result the word line、bit line power model and delay model, together with the area model and analysis of the read/write reliability, we bring out a method to optimize the memory cell and evaluate the performance of the result.

特别对占模块面积和功耗绝大部分比例的SRAM存储单元做了细致的设计和仿真实验，通过采用α指数MOSFET模型推导出SRAM的字线、位线功耗模型和延迟模型，并配合存储单元的面积模型和读写可靠性分析，提出了一种优化存储体单元结构的方法，并对优化前后的性能进行了评估。

At last, based on characteristic of read data operation from SRAM, a precharge circuit using charge-recycling has been employed, and lower down the dissipation durig precharge.

最后，根据本文设计的SRAM读出数据没有使用读出放大器的特点，设计了电荷再分配的预充电路，使得在SRAM预充电时的功耗明显减小。

The boundary of analytical model and statistical model is clearly divided in this performance model, and evaluation accuracy is improved. Secondly, based on embedded SRAM performance hybrid model, this article adopts bionics algorithm-ant algorithm to optimize hierarchical embedded SRAM structure. This method which adjusts memory system structure improves memory system performance. Finally, considering the factors such as memory cell area, power, delay and reliability, this article establishes static 6-T memory cell area, power, delay and static noise margin equations, analyzes 6-T memory cell device dimension constraints under "read upset" and "write upset", then proposes a method to enhance embedded SRAM performance by optimizing 6-T memory cell size. In order to realize embedded SRAM design and verify proposed optimization methods, this article takes the Garfield202 system chip as the platform, which embeds A720T processor and 20KB Scratch-Pad memory.

首先针对嵌入式SRAM结构，采用多元线性回归方法分析SRAM宏单元性能指标，采用解析方法分析控制电路延时，结合以上这两种方法建立嵌入式SRAM性能混合模型，该模型清晰划分两种建模方法的各自适用范围，提高了模型精度；其次以该混合模型为基础建立存储体性能目标函数，采用仿生优化算法—蚂蚁算法优化嵌入式SRAM结构，使之达到最优设计；最后综合考虑面积、功耗、速度以及可靠性等因素，建立静态6-T存储单元面积、功耗、延时以及静态噪声容限方程，分析了&读破坏&和&写破坏&的晶体管尺寸约束，优化了6-T存储单元尺寸，提高了嵌入式SRAM性能。

I didn't watch TV last night, because it .

昨晚我没有看电视，因为电视机坏了。

Since this year, in a lot of villages of Beijing, TV of elevator liquid crystal was removed.

今年以来，在北京的很多小区里，电梯液晶电视被撤了下来。