查询词典 RAM cache

I don't believe they need that much of RAM to cache and process this single page.

我不相信他们需要这麼多的RAM缓存和过程，这在单一网页。

But by high-speed static RAM buffer composition, structure more complex, in the CPU die area can not be the case too, L1 cache capacity level can not be done too.

不过高速缓冲存储器均由静态RAM组成，结构较复杂，在CPU管芯面积不能太大的情况下，L1级高速缓存的容量不可能做得太大。

But by high-speed static RAM buffer composition, structure more complex, in the CPU die area can not be the case too, L1 cache capacity level can not do too much, L1 cache capacity is generally KB .

不过高速缓冲存储器均由静态RAM组成，结构较复杂，在CPU管芯面积不能太大的情况下，L1级高速缓存的容量不可能做得太大，L1缓存的容量单位一般为KB。

TMS 320C30 can implement quick floating-point mathematic operation and can provide large on-chip RAM and ROM space,high speed instruction cache,DMA controller,multi-address generators and suporting high level language programming.

TMS320C30数字信号处理器能实现快速浮点数学运算，并提供了大的在片RAM和ROM空间、高速指令缓冲器、DMA控制器、多地址发生器和支持高级语言编程。

Precision and results are rounded to double precision when copied to double precision variables in RAM/cache.

普通 FP 算术和 SSE2 分级算术的最大不同是，FP 算术使用扩展的精度执行，当用 RAM/cache 复制到双精度变量时，结果也被

This Stop message usually occurs after the installation of faulty hardware or in the event of failure of installed hardware (usually related to defective RAM, either main memory, L2 RAM cache, or video RAM).

这个停止信息通常产生于安装了有故障的硬件或者安装硬件的一个错误操作之后（通常与有缺陷的RAM，可能是主存，二级缓存，或者显存有关）。

To address this feasibility problem, the nonvolatile memory was used as the main memory and part of the RAM as the cache, and a modified verification algorithm with cache policy was proposed. The analysis proved that this algorithm features strong transportability and feasibility.

采用非易失性存储器作为主存， RAM中的一部分空间作为缓存器，并且给出一种相应的Cache调度策略算法，尝试实现一种在卡上的Java卡的字节码校验算法，并且证明了该算法具有较好的可移植性和实现性。

Studied the expansion of the Dual-port Data Cache, designed a Sixteen-ported Data Cache, The simulation results showed that on the average, access time is decreased 20% over Single-port RAM based Data Cache.

对双端口数据Cache进行扩展研究，设计了一个16端口数据Cache，与单端口实现的16端口数据Cache相比，数据Cache平均访问时间降低了20％左右，且硬件实现相对简单，占用芯片面积少。

The characteristics of FIFO, double-port RAM and ping-pang cache structure were compared. The principle and features of ping-pang cache structure were discussed, and a real ping-pang cache structure was also given which consisted of high-speed, large capacity SRAM and FPGA. For a video processing system, this ping-pang cache structure is easy to interface with AD, DA and DSP.

文中比较了FIFO、双口RAM、乒乓缓存结构三种数据缓存电路的优缺点，讨论了乒乓缓冲控制器的结构和原理，并以高速、大容量的SRAM 以及FPGA器件为基础，设计了一种适应于高速DSP图像处理系统的乒乓缓存结构，其特点是速度快、所需器件少，易于与DSP器件接口。

The work in this thesis is part of a Preliminary Research Projects. Based on the design of 32-bit embedded microprocessor "Longtium R2", designed and implemented the Dual-port Data Cache, which is applied to the "Longtium R2" microprocessor, achieved synchronization snooping, and effectively improved the processors performance. Based on the Dual-port RAM, studied Multi-port Data Cache, proposed a Sixteen-ported Data Cache.

本论文研究内容来自西北工业大学航空微电子中心所承担的某预研课题，以参与的32位嵌入式微处理器"龙腾R2"的设计工作为基础，设计并实现了基于双端口RAM的数据Cache，该Cache应用于"龙腾R2"微处理器，能够实现数据同步侦听，提高多机环境下处理器的性能；并在双端口RAM基础上，对多端口数据Cache进行研究，提出一个16端口数据Cache的实现方案。

On the other hand, the more important thing is because the urban housing is a kind of heterogeneity products.

另一方面，更重要的是由于城市住房是一种异质性产品。

Climate histogram is the fall that collects place measure calm value, cent serves as cross axle for a few equal interval, the area that the frequency that the value appears according to place is accumulated and becomes will be determined inside each interval, discharge the graph that rise with post, also be called histogram.

气候直方图是将所收集的降水量测定值，分为几个相等的区间作为横轴，并将各区间内所测定值依所出现的次数累积而成的面积，用柱子排起来的图形，也叫做柱状图。