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Justinian Code相关的网络例句

查询词典 Justinian Code

与 Justinian Code 相关的网络例句 [注:此内容来源于网络,仅供参考]

How are the rights of women similar under the Justinian Code and current American law?

如何根据查士丁尼法典妇女的权利和当前美国类似的法律?

Romans all laws were later incorporated into the "Justinian Code."

罗马人的所有法律后来都被收进《查士丁尼法典》。

Heresy was a crime against the state. Roman law in the Code of Justinian made it a capital offense.

异端学说是一种反国家的罪行,它在罗马法《查士丁尼法典》中被定为死罪。

The enactments of the emperors, clothed at first in the pretence of popular sanction, but afterwards emanating undisguisedly from the imperial prerogative, extend in increasing massiveness from the consolidation of Augustus''s power to the publication of the Code of Justinian.

皇帝们的各种立法起初还伪装经过群众同意,但在后来就毫不掩饰地利用皇权,从奥古斯多政权巩固后到"查斯丁尼安法典"公布,这种法规有大量的增加。

The enactments of the emperors, clothed at first in the pretence of popular sanction, but afterwards emanating undisguisedly from the imperial prerogative, extend in increasing massiveness from the consolidation of Augustus''s power to the publication of the Code of Justinian.

皇帝们的各种立法起初还伪装经过群众同意,但在后来就毫不掩饰地利用皇权,从奥古斯多政权巩固后到&查斯丁尼安法典&公布,这种法规有大量的增加。

The first design example is to generate program code for image processing controller to control picture file output and the second design example is a GPS satellite C/A code generator to generate the C/A code of GPS satellites. C/A code can be used to recognize GPS satellite number in GPS system.

最后我们使用两个例子来验证本工具,一个为影像处理控制器,其功能为控制图档输出功能,另一个为GPS卫星C/A码产生器,其功能在於能够产生太空中GPS卫星所使用的C/A码信号,C/A码在GPS系统中被用来识别GPS卫星编号。

In addition to four nmerac place position,there are three zone bit positions in a 7-bit code,and four zone bit in an 8-bit code.The 7-bit American Standard Code for Information Interchange is widelu used in data communication work and is bu far the most popular code used to represent data internally in personal computers.

除了4位数字位之外,在7位编码中有3个标志位,而在8位编码中则有4个标志位。7位美国信息交换标准代码广泛地用于数据通信,而且是目前个人计算机内部数据表示中最为流行的代码。

In addition to the four numeric place positions, there are three zone bit positions in a 7-bit code, and four zone bit positions in an 8-bit code: The 7-bit American Standard Code for Information Interchange is widely used in data communications work and is by far the most popular code used to represent data internally in personal computers.

因为64种可能的位排列仍不能满足十进制数(10个)、小写字母(26个)、大写字母(26个)和大量的其它字符(26个以上)编码的需要,所以设计者将6位BCD码扩充到7位和8位。7位二进制数可以提供128种不I司的排列(2 ');8位二进制数可以有256种排列(2)。

At present, the supply line merchandise - mask-type bar code scanners, laser bar code scanners, bar code light pen , bar-code reader, magnetic card readers and electronic cash register relevant surrounding.

光罩式条码扫瞄器以其半成品模组和系列成品产品在市场上闻名,其中半成品模组销售到全球各地S/I和电子收银机制造商

Based on a lot of experiment results, a conclusion is drawn: comparing with other factors, the performance of branch handling strategy is the key limits of processor to exploit the instruction level parallelism existed in nonscientific code, cache miss have severe effect on superscalar processor's performance when it runs scientific code. Second, in order to reduce the branch penalty and improve the performance of superscalar processor, a new branch handling strategy—a classification based hierarchical branch handling strategy, CHBHS is proposed. It first expands the traditional processor architecture to support multiple condition code, conditional execution and Mbranch instruction, as a result, compiler can reduce the number of static conditional branch when the code is generated. Then, CHBHS tries to use the best suitable mechanism to deal with different branch base on their different behavior. CHBHS can predict the target address of unconditional branch, subroutine call and conditional branch by buffering their target address in branch target buffer, a newly proposed high efficient return address stack is used to reduce the penalty of subroutine return instruction, a new Counter Register Stack is also proposed to reduce the penalty of loop-closing branch to zero, and dynamic branch predictor is incorporate with branch target buffer to predict the outcome of conditional branch.

基于上述结论,为了尽量消除转移指令对处理器开发指令级并行性能力的影响,进一步提高处理器性能,在详尽分析目前已存在的转移处理策略的特点与局限性的基础上,首次提出了一种新的转移处理策略即基于分类的层次转移处理策略CHBHS(Classification Based Hierarchical Branch Handling Strategy),它首先通过扩展传统的体系结构,支持多条件码、条件式执行及多分支转移技术,以使编译程序在进行代码生成时可尽量少生成条件转移指令,从而减少静态条件转移指令的数目;其次,基于不同的转移指令的行为不同这一事实,提出了对不同的转移指令采用不同的机制进行处理的思想,即对无条件转移指令和函数调用指令以及条件转移指令的目标地址,采用转移目标缓冲器来预测,对于函数返回指令,采用所提出一种的高效返回地址栈来预测其目标地址,对于大多数循环控制转移指令,采用所提出的Counter Register Stack来将其所可能带来的损失减少为0,对于其他的条件转移指令采用动态预测机制来预测其方向。

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