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FIFO相关的网络例句
与 FIFO 相关的网络例句 [注:此内容来源于网络,仅供参考]

To some extent, the FIFO method approximate s the results that would be obtained by specific identification of costs.

从某种程度上说,采用先进先出法计算的结果与采用个别辨认法计算的结果大体相同。

By simulation, it is found that both algorithms performed better than FIFO and LRU in terms of initial buffer delay, movie replicas number and dependency on the root with various peers' arrival interval.

同LSB(1east sent bytes)算法相比,某些场景中sD的启动延迟减少了约40%,而REP在副本数量方面远远超过LSB的结果,说明在P2P网络流媒体服务中使用SD和REP缓存置换算法有助于提高系统性能。

The first-in, first-out method, which is often referred to as FIFO, is b as ed on the as sumption that costs should be charged against revenue in the order in which they were incurred .

先进先出法,通常称为FIFO,是基于这样一个假定,即成本应按发生的先后顺序抵减收益。

Center of a log changes a design to collect a project, front has 230 server, use Syslogd amasses a daily record, protect disk of existence this locality while send a log center server to Syslog-ng additionally, central server issues the daily record to two destination at the same time: Memory of this locality disk and a FIFO.

一个日志中心化设计收集项目,前端有230台的服务器,使用syslogd收集日志,保存在本地磁盘的同时另外发一份到syslog-ng的日志中心服务器上,中心服务器同时把日志分发到两个目的地:本地磁盘存储和一个FIFO。

Most almost-correct FIFO designs function properly 99%+ of the time.

不幸的是,这些99%时间都能正确工作的FIFO在设计上的瑕疵通常情况下是最难发现和调试的,而且发现这些瑕疵的成本可能也是最高的。

Switching between the video modes is realized by reassigning connections of tasks (20, 22, 24, 26) to respective ones of the communication buffers (16a-d), keeping previous data in the reassigned FIFO communication buffers (16a-d).

视频模式的切换是通过重新分配任务(20,22,24,26)到通信缓冲器(16a-d)中各个缓冲器的连接、将之前的数据保持在重新分配的FIFO通信缓冲器(16a-d)中来实现的。

But the FIFO scheme provides a pretty good way of implementing semaphores.

但FIFO的计划提供了一个不错的方式执行信号量。

013 Fifo communication with the setup, you also have time to look at!

详细说明:68013与fifo通信设置,还请各位有时间看看!

Firstly it introduces relevant technical developments and trends, the task background and significance of the study, then analyzes hardware circuit of using image sensor as images collected, and utilizes the SAA7113 chip to deal with video image beforehand, SAA7113 lets the output of standard digital video signals to storage in FIFO memory, and decodes clock signals, Highlighted microprocessor control external circuit design of false coin and counting, and DSP control external circuit design, such as memory expand ect;Finally analyses CPLD as logic controller to control the logic and scheduling of some part ,and gives the undee emluator of some logic circuit.

文章首先阐述人民币智能分捡器相关技术的发展状况、发展趋势以及课题背景与研究意义;然后设计了利用图像传感器采集人民币图像输出模拟视频信号的硬件电路,以及利用视频解码芯片(SAA7113)对模拟视频图像进行预处理,SAA7113输出的标准数字视频信号存入FIFO存储器,同时还解码输出场、行同步信号、像素时钟信号送入CPLD等部分电路;重点设计了单片机控制验钞、点钞等外围电路,以及DSP控制的外围电路,如存储器的扩展等部分;最后完成CPLD对部分器件的逻辑和时序控制设计,并对逻辑电路的功能进行仿真,仿真结果令人满意。

I use it from storing HWNDs,status flags up to memory resistent fifo queues.

我用它存储HWND,状态标记,以及内存fifo队列。

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This one mode pays close attention to network credence foundation of the businessman very much.

这一模式非常关注商人的网络信用基础。

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