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DMA相关的网络例句
与 DMA 相关的网络例句 [注:此内容来源于网络,仅供参考]

So, how to realize and optimize DMA in the embedded microprocessor system becomes an urgent and important problem to be solved.

如何在嵌入式微处理器系统中实现和优化DMA成为这种发展趋势下亟需解决的重要问题。

For SB on PCI, we do provide different kinds of scheme to resolve this DMA on PCI issues.

我们使用不同种类的技术来解决 Sound Blaster 的 DMA 在 PCI 上的关键问题。

Arm920t the DMA program, and I hope to help the broad masses of friends.

基于s3c2410的arm920t的DMA编程,希望对广大朋友有帮助。

and program of DMA transfer data is realized with VHDL language.

提供了基于PCI总线的多通道同步串行数据采集系统的硬件实现方案,分析了整个系统的结构,详细描述了FPGA内部硬件资源的划分和使用VHDL语言实现DMA传输数据的方法和源代码。

Additionally to the implementation, the worst case requirements of hardware CPU cycles, internal and external memory, DMA channels,...

此外,在执行方面,最糟糕的情况所需的硬件 CPU的内部和外部的内存, DMA通道,。。。

During the migrating and optimizing process of targeted platform, this paper starts with the analysis on complexity of H.264/AVC algorithms, carries on plenty of tests, uses a series of optimizing methods aiming at the special hardware resources of PWBSP-16 platform: optimizing modules including SAD Calculate, Integer Transform and Quantization in the instruction level by using FIRtree instruction set; optimizing it by improving coding process and enabling co-processor such as VLx、DMA in system level by the thinking of modules parallelism maximizing; putting forward the future optimizing mind in the level of algorithms.

在目标平台的移植优化过程中,本文从H.264/AVC编码算法的复杂度分析入手,进行了大量的测试分析,并针对PWBSP-16 DSP处理器特殊的硬件资源,采取了如下一系列的优化策略:在指令级方面,采用FIRtree指令集对SAD计算、整型变换、量化等主要耗时模块进行优化;在系统级方面,采用模块并行最大化的思想,通过改进编码流程,启用VLx、DMA等协处理器等方法进行优化;在算法级方面,提出后续的优化思路。

Can also be in the "System Properties / Device Manager" window changes to the equipment IRQ interrupt, DMA channels, I / O address value to address the problem.

同样也可以在"系统属性/设备管理器"窗口修改该设备的IRQ中断、DMA通道、I/O地址的值来解决该问题。

The main reason for the conflict in the hardware: add new hardware, you add new hardware devices occupy the original IRQ interrupt, DMA channels, I / O address of the computer resources, in between the old and the new hardware resource conflicts.

硬件冲突的主要原因:添加新硬件时,你新添加的硬件占用了原有设备的IRQ中断、DMA通道、I/O地址等计算机资源,在新旧硬件之间发生了资源冲突。

This paper addresses high speed communication solution between 16 bit microcontroller?based data acquisition system and PC/AT compatible computer. After 16 bit Industry Standard Architecture peripheral interface of PC is analysed, a 16 bit parallel communication card is developed with three kinds of optional modes: poll, interrupt and DMA.

为了解决单片机数据采集系统与PC机之间大数据量交换时的低速问题,剖析了目前广为流行的PC/AT兼容机ISA通道的16位I/O接口原理,并通过细致的电路设计,开发了一种通用性很强的高速16位并行通讯插卡,且使用了3种可选的通讯方式,即查询、中断和DMA。

TL084MJ Pinout: 3.3V Operation with 5V Tolerant Buffers ACPI 1.1, PC99/PC2001 Compliant LPC Interface with Clock Run Support Serial IRQ Interface Compatible with Serialized IRQ Support for PCI Systems 15 Direct IRQs Four 8-Bit DMA Channels ACPI SCI Interface nSMI Shadowed write only registers Internal 64K Flash ROM Programmed From Direct Parallel Interface, 8051, or LPC Host 2k-Byte Lockable Boot Block Can be Programmed Without 8051 Intervention Three Power Planes Low Standby Current in Sleep Mode Intelligent Auto Power Management for Super I/O ACPI Embedded Controller Interface Configuration Register Set Compatible with ISA Plug-and-Play Standard (Version 1.0a) High-Performance Embedded 8051 Keyboard and System Controller Provides System Power Management System Watch Dog Timer 8042 Style Host Interface Supports Interrupt and Polling Access 256 Bytes Data RAM On-Chip Memory-Mapped Control Registers Access to RTC and CMOS Registers Up to 16x8 Keyboard Scan Matrix Two 16 Bit Timer/Counters Integrated Full-Duplex Serial Port Interface Eleven 8051 Interrupt Sources Thirty-Two 8-Bit, Host/8051 Mailbox Registers Thirty-six Maskable Hardware Wake-Up Events Fast GATEA20

TL084MJ引脚说明: 3.3V工作电压为5V容错缓冲器的ACPI 1.1,PC99/PC2001符合LPC接口与时钟运行支持-兼容串行接口与串行的IRQ IRQ的支持PCI系统- 15直接的IRQ - 4个8位DMA通道- ACPI的SCI接口- nSMI -阴影只写寄存器内部的64K的Flash ROM -直接从程序并行接口,8051,还是LPC主机-的2K字节可锁定引导块-可在不干预程序8051三力飞机-低待机电流在休眠模式-智能型自动电源管理的超级I / O的ACPI嵌入式控制器接口配置寄存器设置兼容的ISA拆开的播放标准(版本1.0a)高性能嵌入式8051键盘和系统控制器-提供系统电源管理-系统监视狗定时器- 8042型主机接口-支持中断和轮询访问- 256字节数据RAM -片上存储器映射控制寄存器-获取实时时钟和CMOS寄存器-最多16x8矩阵键盘扫描- 2个16位定时器/计数器-综合全双工串行接口- 11个中断源8051 - 32个8位,Host/8051邮箱寄存器- 36个可屏蔽硬件唤醒事件-快速GATEA20

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