音频通道

词组短语

sound channel

与音频通道相关的网络例句 [注：此内容来源于网络，仅供参考]

Wave Settings allow channel selection, amplification and more than 30 output audio formats.

波设置允许通道选择，扩增和30多个输出音频格式。

Channel status blocks describe the audio format, sampling rate, bit depth etc.

通道状态区块描述音频的格式，采样率，采样深度等。

Every receiver uses decipher of 48 Blackfin processor the MPEG1 L2 frequency of 384 passageways flows.

每个领受器都采用48个Blackfin措置器解码384个通道的MPEG1 L2音频流。

The RSX-965 is a five-channel audio/video receiver that carries a boatload of features.

该RSX - 965是一款五通道的音频/视频接收器，带有船的功能。

The EQ-2 boasts two channels of fully parametric 4 band valve equalisation - which in conjunction with variable high and low cut filters offers unlimited control of any audio source.

EQ-2具有2通道全参数4段电子管均衡，联合可变的高和低频修剪滤波为任何音频输入提供无限的控制。

First of all, this paper discusses the designing of minimal system about TMS320C5402 DSP device in detail. Secondly, this paper describes the communication method between TMS320C5402 and TLC320AD50C when the multichannel buffered serial port of C5402 is set up in serial port mode. Hardware configuration and software diagram are described. Thirdly, this paper introduces a designing of human-machine interface device, including hardware interface and accompanying software routine.

首先，详细介绍了基于TMS320C5402芯片的DSP实验系统的最小系统设计；其次，介绍了TMS320C5402的多通道缓冲串口与音频接口芯片(TLC320AD50C)在串口工作模式下实现串行通讯的设计，并给(来源：5cAB9fC论文网www.abclunwen.com)出相应的硬件配置、软件流程；再次，阐述了TMS320C5402的人机接口软硬件设计；最后，本文设计出了一些基本实验和有针对性的实验。

The highly integrated CX2070X SoCs include an integrated audio/voice digital signal processor, multi-bit codec, digital and analog input/out interfaces, and a power efficient 2.5-watt per channel Class-D amplifier to drive stereo speakers or optional post-width modulation and differential line-out for external speaker systems amplifiers.

高度集成的 CX2070X SoC 内置了集成的音频/语音数字信号处理器、多位编解码器、数字和模拟输入/输出接口，以及每通道功效为 2.5 W 的、驱动立体扬声器的或可选的后宽度调制的 D 类放大器，还有用于外部扬声器系统放大器的差分线路输出。

Audio processing support - built in DirectSound, basic audio processing (preamp, remove left/right channel, channel swap etc.), advanced video processor equalizer, echo, pitch, normalizer, true bass, treble etc.

音频处理支持-建于D irectSound的，基本的音频处理（前置，排除左/右通道，通道互换等），先进的视频处理器（均衡器，回声，音调，正规化，真正的低音，高音等

MAX1999EEI Pinout: 8- to 32-bit and 16- to 32-bit word packing options Programmable wait state options: 2 to 31 CCLK Digital audio interface includes six serial ports, two pre- cision clock generators, an input data port, three programmable timers and a signal routing unit Serial ports provide: Six dual data line serial ports that operate at up to 50 Mbits/s for a 200 MHz core on each data line each has a clock, frame sync, and two data lines that can be configured as either a receiver or transmitter pair Left-justified sample pair and I2S support, programmable direction for up to 24 simultaneous receive or transmit channels using two I2S compatible stereo devices per serial port TDM support for telecommunications interfaces including 128 TDM channel support for telephony interfaces such as H.100/H.110 Up to 12 TDM stream support, each with 128 channels per frame Companding selection on a per channel basis in TDM mode Input data port provides an additional input path to the DSP core configurable as either eight channels of I2S or serial data or as seven channels plus a single 20-bit wide syn- chronous parallel data acquisition port Supports receive audio channel data in I2S, left-justified sample pair, or right-justified mode Signal routing unit provides configurable and flexible connections between all DAI components, six serial ports, an input data port, two precision clock generators, three timers, 10 interrupts, six flag inputs, six flag outputs, and 20 SRU I/O pins Serial peripheral interface Master or slave serial boot through SPI Full-duplex operation Master-slave mode multimaster support Open drain outputs Programmable baud rates, clock polarities, and phases 3 Muxed Flag/IRQ lines 1 Muxed Flag/Timer expired line ROM based security features: JTAG access to memory permitted with a 64-bit key Protected memory regions that can be assigned to limit access under program control to sensitive code PLL has a wide variety of software and hardware multi- plier/divider ratios JTAG background telemetry for enhanced emulation features IEEE 1149.1 JTAG standard test access port and on-chip emulation Dual voltage: 3.3 V I/O, 1.2 V core Available in 136-ball BGA and 144-lead LQFP packages Lead free packages are also available

MAX1999EEI引脚说明： 8 - 32位和16 - 32位字包装选择可编程等待状态的选择：2至31个CCLK数字音频接口包括6个串行端口，两个前643时钟发生器，输入数据端口， 3可编程定时器和一个信号路由单元串行端口提供：六双串口数据线，在高达50 Mbps的操作/为200兆赫的每个数据行每个人都有一个时钟，帧同步的核心秒，和两个数据可以作为任何一个接收器或发射器对左对齐和I2S配对样本的支持下，最多可同时接收或传送24个频道，每使用两个系列的I2S兼容立体声设备配置可编程方向线；港口的TDM通信接口，包括支持128个电话接口的TDM的渠道，如H.100/H.110支持多达12个的TDM流的支持下，每帧128个频道每个压缩扩展每通道的基础上选择在TDM模式输入数据端口提供了一个额外的输入路径的DSP核心配置为I2S或串行数据或7加一个20位宽的SYN -异步的并行数据采集接口通道或8通道；支持接收通道I2S音频数据，左对齐样本对，或右对齐模式信号路由单元组件之间提供所有戴配置和灵活的连接，6个串行端口，一个输入数据端口，两个精密时钟发生器，3个定时器，10个中断，六旗投入，产出6个旗，20曼谷南南区域股的I / O管脚串行外设接口的硕士或奴隶通过SPI串行启动全双工运作主从模式多主机支持开漏输出可编程波特率，时钟极性和第三期合并调制旗/ IRQ线路1合并调制旗/定时器过期线光盘的防伪特征：JTAG的访问与64位受保护的关键允许内存内存可分配给程序访问控制的限制下对敏感地区有一个代码锁相环/遥测分比率为背景的JTAG仿真功能增强的IEEE 1149.1 JTAG标准测试访问端口的软件和硬件多钳各种各样和片上仿真双电压：3.3六/输出，可在1.2 V核心136球BGA封装和144引脚LQFP封装无铅封装，也可

TDA4864 Pinout: 8- to 32-bit and 16- to 32-bit word packing options Programmable wait state options: 2 to 31 CCLK Digital audio interface includes six serial ports, two pre- cision clock generators, an input data port, three programmable timers and a signal routing unit Serial ports provide: Six dual data line serial ports that operate at up to 50 Mbits/s for a 200 MHz core on each data line each has a clock, frame sync, and two data lines that can be configured as either a receiver or transmitter pair Left-justified sample pair and I2S support, programmable direction for up to 24 simultaneous receive or transmit channels using two I2S compatible stereo devices per serial port TDM support for telecommunications interfaces including 128 TDM channel support for telephony interfaces such as H.100/H.110 Up to 12 TDM stream support, each with 128 channels per frame Companding selection on a per channel basis in TDM mode Input data port provides an additional input path to the DSP core configurable as either eight channels of I2S or serial data or as seven channels plus a single 20-bit wide syn- chronous parallel data acquisition port Supports receive audio channel data in I2S, left-justified sample pair, or right-justified mode Signal routing unit provides configurable and flexible connections between all DAI components, six serial ports, an input data port, two precision clock generators, three timers, 10 interrupts, six flag inputs, six flag outputs, and 20 SRU I/O pins Serial peripheral interface Master or slave serial boot through SPI Full-duplex operation Master-slave mode multimaster support Open drain outputs Programmable baud rates, clock polarities, and phases 3 Muxed Flag/IRQ lines 1 Muxed Flag/Timer expired line ROM based security features: JTAG access to memory permitted with a 64-bit key Protected memory regions that can be assigned to limit access under program control to sensitive code PLL has a wide variety of software and hardware multi- plier/divider ratios JTAG background telemetry for enhanced emulation features IEEE 1149.1 JTAG standard test access port and on-chip emulation Dual voltage: 3.3 V I/O, 1.2 V core Available in 136-ball BGA and 144-lead LQFP packages Lead free packages are also available

TDA4864引脚说明： 8 - 32位和16 - 32位字包装选择可编程等待状态的选择：2至31个CCLK数字音频接口包括6个串行端口，两个前643时钟发生器，输入数据端口， 3可编程定时器和一个信号路由单元串行端口提供：六双串口数据线，在高达50 Mbps的操作/为200兆赫的每个数据行每个人都有一个时钟，帧同步的核心秒，和两个数据可以作为任何一个接收器或发射器对左对齐和I2S样本对支持，最多可同时接收或传送24个频道，每使用两个系列的I2S兼容立体声设备配置可编程方向线；港口的TDM通信接口，包括支持128个电话接口的TDM的渠道，如H.100/H.110支持多达12个的TDM流的支持下，每帧128个频道每个压缩扩展每通道的基础上选择在TDM模式输入数据端口提供了一个额外的输入路径的DSP核心配置为I2S或串行数据或7加一个20位宽的SYN -异步的并行数据采集接口通道或8通道；支持接收通道I2S音频数据，左对齐样本对，或右对齐模式信号路由单元组件之间提供所有戴配置和灵活的连接，6个串行端口，一个输入数据端口，两个精密时钟发生器，3个定时器，10个中断，六旗投入，产出6个旗，20曼谷南南区域股的I / O管脚串行外设接口的硕士或奴隶通过SPI串行启动全双工运作主从模式多主机支持开漏输出可编程波特率，时钟极性和第三期合并调制旗/ IRQ线路1合并调制旗/定时器过期线光盘的防伪特征：JTAG的访问与64位受保护的关键允许内存内存可分配给程序访问控制的限制下对敏感地区有一个代码锁相环/分比率背景遥测的JTAG仿真功能增强的IEEE 1149.1 JTAG标准测试访问端口软件和硬件多钳各种各样和片上仿真双电压：3.3六/输出，可在1.2 V核心136球BGA封装和144引脚LQFP封装无铅封装，也可

与音频通道相关的网络解释 [注：此内容来源于网络，仅供参考]

analog-to-digital converter：模/数转换器

采样频率(采样率)=音频带宽,是指模数转换器(Analog to Digital converter)每秒对模拟声音进行测量并存储为数字信息的次数. 这个过程叫采样. 44.1 kHz是CD标准,也就是说对于每条音频通道,每秒有44,100个样本. 比特深度(Bit Depth)或解析度(Resolution)=动态范围(Dynamic Range),

audio cassette recording：音频盒带记录,音频盒式磁带记录

audio cassette interface 卡型盒式磁带机接口,录音带接口 | audio cassette recording 音频盒带记录,音频盒式磁带记录 | audio channel 声频通道

baud rate：波特率

传输通道有不同厂家生产的载波、光端、微波、扩频等不同设备组成,还有通过数千米音频电缆传输的,所以在安装调试中经常发生不通或误码率高等问题. 现就安装、运行维护中碰到的问题,对远动设备常见故障的查找方法与步骤作一介绍. 2.1 波特率(Baud Rate)要统一

chatroom：网络聊天室

网络环境中的交流活动,依据通道的不同主要有(1)基于文本的方式,借助于目前网络聊天室 (chatroom)、电子白板、BBS站点、QQ等技术的支持. (2)基于视频会议的交往方式,视频会议系统支持文本、图纸、图像、音频、视频等等,交往主体可以"面对面"地交流.

MICE Mobile Interwork Control Element：移动互通控制单元

MICDATA Microphone Data 送话通道数据信号 | MICE Mobile Interwork Control Element 移动互通控制单元 | MICFB- Microphone Feedback- 送话音频反馈输出

notch filter：凹口滤波器

该凹口滤波器(notch filter)在大约4.5MHz的视频信号中建立窗口,以便于音频和视频信号在通道3/4的RF调节器中结合之前消除二者之间的干扰. 飞兆半导体视频产品技术营销经理Jeremy Tole表示表示:"飞兆半导体的高集成度视频滤波器通过有效地取代分立重建滤波器、外部声音凹口和群延迟补偿电路及线缆驱动器,

subvitreous luster：半玻璃光泽

subvital gene 亚生活力基因 | subvitreous luster 半玻璃光泽 | subvoice-grade channel 副音频等级信道,亚音频级通道

audio-frequency channel：配音通道

audio frequency amplifier ==> 音频放大器 | audio-frequency channel ==> 配音通道 | audio-frequency choke ==> 声频扼流圈

voice-grade modems：语音级调变解调器

音级电路 voice-grade circuit | 语音级调变解调器 voice-grade modems | 话音级服务(音频通道) voice-grade service

AF：音频

★信噪比S/N:>105dB. ★控制器:电源开/关、通道选择器、音频电平音量. ★音频输出电平:-12dB. ★音频(AF)输出阻抗:600欧. ★工作电压:12-18VDC,500mA. [产品说明书]暂无产品参数其它参数产地台湾