转换速率

词组短语

slew rate

与转换速率相关的网络例句 [注：此内容来源于网络，仅供参考]

By analyzing the pulse transformer and ideal drive electric current wave, we try to improve the rate of changing-over, discuss the damped oscillation, point out existing circuit design error, and working a new circuit design which can reduce the common circuit circulation and switch loss.

通过对脉冲变压器及理想激励电流波形的分析，如何提高转换速率，阻尼振荡予以讨论，指出目前存在的设计误区，做出减少共态导通与开关损耗的新设计。

This high voltage electrostatic precipitation controller has 7 channels of analog input,2 channels of analog output, 12 digital inputs and 16 digital outputs. The analog input includes primary current, secondary current, primary voltage, secondary voltage, etc. Controller uses MAX 187 as the A/D converter, which ensure the sampling speed and the conversion precision in the same time. The processor unit is RCM2250 module. Rabit 2000 processor, a 128K SRAM and a 256K Flash Rom are integrated in RCM2250, which improves the performance of pricipitation controller. MAX504 is used to produce the 4~20mA current output.

模拟量输入采集的信号有升压变压器一次电流、一次电压、二次电流、二次电压等，采用12位逐次比较式A/D转换器MAX187，兼顾采样速率和转换精度；中央处理单元采用以8位嵌入式处理器Rabbit2000为基础的RCM2250模块，外扩128KSRAM和256K Flash ROM，内部资源丰富，提高了控制器的整体性能；模拟量输出采用内带基准源的10位电压输出数模转换器MAX504，实现了标准4～20mA电流信号输出；控制器通过控制算法在相应开关量点上输出可控硅的触发脉冲。

Since this connection is usually used at very low switching speeds, slew rate is not normally a practical consideration and overcompensation does not reduce accuracy.

鉴于本电路常用于切换频率很低的场合，转换速率一般不是关键指标，因此过补偿不会降低精度。

The ADC is pipelined, including a single-input/difference-output sample/hold circuit and nine stage subcircuits. The preceding eight stages are 1.5bits/stage, and the last stage consists of two comparators. Every input sample is converted into 18 bits binary signals, and these binary signals are converted into 10 bits binary signals through digital correction circuit.

模数转换电路采用流水线式的结构，包括具有单端输入/差动输出功能的采样保持电路和九级的子电路，前八级子电路使用1.5位/级的结构，最后一级使用两个比较器实现，每个输入值被转换为18位的二进制代码，通过数字纠正技术最终实现10位的输出，按照前端电路的应用要求，这个模数转换器实现1.33MHz的采样速率。

These conclusions suggest that the extrusion rate and extent to east of the material is limited, in line with the "thrust imbricated conversion - limited extrusion model."

总的来看，肃北地区的主要断裂滑动速率和逆冲速率都比较低，叠瓦状逆冲现象比较普遍，区内有断裂、盆地、褶皱等多种构造参与了变形分解和运动转化，这些结论都说明了该地区物质向东挤出的速率和幅度是有限的，符合&叠瓦状逆冲转换—有限挤出模型&。

Keywords : CFOA, Compens AT ion Circuit, Complementary input structure, Low voltage

并采用0.6 工艺参数，在1.5V电源电压下利用HS PIC E进行了仿真，获得了4.95mW的功耗，输入电阻为4.5k ，相位裕度为53.5度以及与增益无关的带宽和极大的转换速率。

The average percent value of G C (49.3%) was less than that of A T (50.7%), there was a bias of the content of G, T in the third codon; The number of transition G-A and T-C were 22, 15 respectively, which were higher than that of transition A-G and C-T, the number of tranversion C-A, T-G is 2 respectively, and other tranversion patterns didnt occur; the probability of transition was higher than that of tranversion , Ts/Tv = 9.5-19, there was the highest number of transition in the third codon. The gamma parameter a of the lst,nd and 3rd codon positions were 0.00572,0.01237 and 1.05239 respectively, they showed that there was adifferent substitution rate at different codon position. Frequences of synonymous codon usage were relatively biased. The average rates of synonymous and nonsynonymous substitution were 0.0787, 0.0011 respectively, there was a significant difference between dS and dN (Z = 4.713, p.01), and the low ratio( CD = 0.0284 .3) of dN/dS ratio impled that there were selective constraints against the nonsynonymous sites in cyt-b gene, The distribution of nonsynonymous codon substitution pattern related to Grantharm distance indicated that the purified selection at 2nd codon positions was more intensive than that at 1st codon positions. The phylogenetic trees supported the view of the double origin of Chinese goose, which means that domestic Chinese goose was derived from Anser cygnoides and domestic European goose, and Yili was derived from Anser anser.

碱基含量分析可知，序列的G C含量(49.3％)＜A T含量(50.7％)，密码子第三位点的G、T含量都有较强的偏倚性；序列间G→A和T→C的转换数(22次和15次)高于A→G和C→T的转换数(10次和9次)，C→A、T→G颠换数均为2次，其余颠换模式均未发生；转换数明显高于颠换数，Ts／Tv=9.5～19，密码子第三位点的转换数最高，呈现了相当强烈的转换偏倚性；密码子第一、二和三位点的gamma分布参数α值分别为0.00572、0.01237和1.05239，表明密码子第一位点的替换速率变异最大，第二位点次之，第三位点的替换速率变异相对较小；编码同一氨基酸的同义密码子并非随机使用，表现出一定程度的使用偏倚性；同义替换速率和非同义替换速率分别为0.0787和0.0011，dS与dN值间的差异极显著(Z=4.713，p＜0.01)，而ω=0.0284，明显小于0.3，表明雁属鹅细胞色素b基因序列经历了中度净化选择作用；单步非同义替换(Sing-step nonsymonymous codon substitution，SSNCS)分布模式与Grantharm距离之间的关系说明密码子的三个位点所受的净化选择强度不同；构建的最大简约树与邻接树拓扑结构一致，支持中国家鹅的双起源学说，即除伊犁鹅外的其它中国鹅品种起源于鸿雁，伊犁鹅和欧洲的郎德鹅、莱茵鹅起源于灰雁。

A design and implementation method of the high speed modulation system, which adopted the new techniques of the FPGA and DAC based communication system,is presented in this paper. The effect of the key techniques of this system, such as the high speed digital signal processing for modulation, high speed based-band signal conversion, wide-band modulation, carrier suppression, high frequency and high precision system clock generation, is analyzed, and the solutions and performance analysis is also given. Finally, a high speed modulation system for space applications is implemented, can be used for high speed data transmission with QPSK, 8PSK, QAM or other kinds of digital modulation.

本论文依据正交调制原理，采用基于FPGA和DAC的设计技术，提出了一种高速、灵活的调制系统的设计方法，重点分析了系统组成的调制编码映射、基带脉冲信号转换、信号滤波、调制、系统时钟产生等关键技术环节的影响，解决了高速调制信号处理、高速数据转换、宽带调制、载波抑制、高频率高精度系统时钟的产生等关键技术问题，完成了一种适用于空间应用的高传输速率、多进制数字调制方式和调制体制灵活的数据传输调制系统的设计与实现，可在硬件设计不变的情况下，实现QPSK、8PSK和16QAM等多种调制方式的高速数据传输，QPSK调制速率达到500Mbps。

10Gigabit Ethernet (10 GBASE-R and 10 GBASE-W) uses 64B/66B coding and decoding, which is the code format transform without the high transition density and its redundancy is small at the cost of complicated synchronization and the storage. Thus scramble is added to the 64B/66B and descramble is otherwise added before the 64B/66B decode.

它的10 GBASE-R和10 GBASE-W标准中物理编码层采用了64B/66B编解码方案。64B/66B码只是一种码的格式转换，并没有显著增加码的0、1转换密度。64B/66B编解码方案包括64B/66B码格式转换、扰码/解扰以及数据速率转换。64B/66B码冗余度很小，其代价是同步所需时间和资源相对较多。

Based on multi-stage comparison, a new theory incorporating Minimum Comparator Number Algorithm and Power-Conversion Rate Merit Model is proposed, which releases the power dissipation from limitation of comparators, sub-DACs and residual amplifiers in high-speed high-resolution ADCs.

摘要该文依据多级比较原理，建立了ADC功耗-速率优值模型。基于比较器数目最优算法，推导出多级ADC最优比较器数目，并提出多级ADC功耗-速率优值参数，从而得到可实现小功耗、高转换速率的多级ADC优化结构。

与转换速率相关的网络解释 [注：此内容来源于网络，仅供参考]

Baud rate switch：波特速率选择开关

battery-conserving switch 节电开关 | Baud rate switch 波特速率选择开关 | beam lobe switching 波束瓣转换法

conversion rate：转换速率

2) 转换速率(Conversion Rate)是指完成一次从模拟转换到数字的AD转换所需的时间的倒数. 积分型AD的转换时间是毫秒级属低速AD,逐次比较型AD是微秒级属中速AD,全并行/串并行型AD可达到纳秒级. 采样时间则是另外一个概念,是指两次转换的间隔.

analog-to-digital conversion rate：模-数转换速率

analog-to-digital conversion accuracy 模-数转换准确度 | analog-to-digital conversion rate 模-数转换速率 | analogue computer 摹拟计较单位

Squib drivers：电爆激励器KMd中国学习动力网

Squegger 间歇振荡器KMd中国学习动力网 | Squib drivers 电爆激励器KMd中国学习动力网 | SR speed ratio 转换速率KMd中国学习动力网

flank speed：极高速度 比高速大一定增量的速率

nuclear converter 核转换器, 转换堆 | flank speed 极高速度 比高速大一定增量的速率 | trunkpiston 筒状活塞

Sample rate：采样速率

为了保证转换的正确完成,采样速率(Sample Rate)必须小于或等于转换速率. 因此有人习惯上将转换速率在数值上等同于采样速率也是可以接受的. 常用单位是ksps和Msps,表示每秒采样千/百万次(kilo

Sample rate：取样速率

频宽(Bandwidth)描述的是模拟前端在振幅损失最少的前提下,将信号从外部世界传入ADC的能力;取样速率(Sample Rate)是ADC将模拟输入波型转换为数字资料的频率;奈奎斯特定理(Nyquist Theorem)说明取样速率和受测信号的频率之间的关系.

Sample rate conversion：取样速率转换

Sample period 采样时间间隔 | Sample rate conversion 取样速率转换 | Sample rate 取样速率

spontaneous emission rate：自发辐射速率

反复自然流产:spontaneous abortion | 自发辐射速率:spontaneous emission rate | 参量下转换:Spontaneous parametric down-conversion

getty：设置终端机模式、连线速率和管制线路

getlist下载新闻组清单 | getty设置终端机模式、连线速率和管制线路 | giftopnm转换图形文件