- 更多网络例句与译码器相关的网络例句 [注：此内容来源于网络，仅供参考]
-
Based on optimizing the interleave algorithm of 3GPP, a turbo encoder is implemented using FPGA technique.
在对3GPP的交织算法进行优化的基础上，基于FPGA技术实现了Turbo码编码器；在对用Max-Log-MAP算法进行优化的基础上，基于DSP技术实现了Turbo码的译码器；最后通过接口实现了一个完整的Turbo码编、译码系统。
-
The layered video decoding system comprises a base layer decoder for receiving and decoding a base layer video stream; and an enhancement layer decoder for receiving an enhancement layer video stream and the decoded base layer stream, and generating a decoded enhanced video output, wherein the enhancement layer decoder includes: a plurality of inverse discrete cosine transform /IDCT modules; and a selection system for selecting one of the IDCT modules.
分层视频译码系统包括：基本层译码器，用于接收和译码基本层视频流；和增强层译码器，用于接收增强层视频流和所译码的基本层流，并生成译码的增强的视频输出，其中该增强层译码器包括：多个反离散余弦变换模块；和用于选择其中一个IDCT模块的选择系统。
-
The decoder implements a stopping rule through use of signature codes to determine whether successive iterations of decoder data are the same.
这种译码器是利用签章信息码决定译码器数据的连续叠代是否相同，藉以实施一停止规则。
-
A new decoder architecture is proposed to solve the problem of huge resources use in traditional LDPC decoder, which needs less logic resources and memory resources by dividing submatrix to improve serial factor of decoder.
针对传统译码器硬件资源消耗巨大的缺陷，提出一种新型的译码器硬件实现方案，通过切割子矩阵的方法，进一步提高硬件结构的串行度，从而大大减少了逻辑资源和存储块的使用。
-
The paper describes a new iterative decoding algorithm for the product codes, its feedback method is completed by a linear combination of soft output of encoder and the receipt information is different with the traditional turbo iterative decode. When decoder obtains the soft output matrix built -1 and +1, the complexity can be reduced greatly and the performance can be lost utile by reducing the number of candidate code words and omitting the complicated operation of LLR.
针对乘积码提出一种新的迭代解码算法，该算法的反馈方式有别於Turbo码的传统迭代译码，是通过输出软信息与接收软信息进行线性叠加来实现的，此时子译码器的候选码字个数将大为降低，同时译码输出也无须做复杂的LLR计算，直接映射为由-1，+1组成的软输出矩阵，从而在牺牲较小性能的情况下很大程度地降低了译码复杂度。
-
The Turbo-codes encoder is comprised of Recursive Systematic Convolutional Codes, which is connected by an interweaver. And the decoding algorithm of Turbo-codes, such as MAP, Max-log-MAP and SOVA, are all based on the soft input and soft output module.
传统的Turbo码山两个经交织器连接的分量码编码器级联而成，且Turbo码的译码采用了软输入软输出的算法思想和迭代译码的方法，使子译码器之间可以相互传递软信息，保证编码信息的充分利用。
-
In the scheme, the encoder consists of an outer encoder and an interweaver, serially concatenating with a transition function. At the decoder, a serial iterative structure is adopted to decode the codes.
该方案的编码器由外编码器，交织器和差分跳频转移函数串行级联组成，译码器采用串行迭代结构译码。
-
Simulation results show that the performance of the decoders approaches that of Viterbi decoder.
研究了实现卷积码译码的神经网络译码器，通过实验验证了译码器的性能。
-
This paper introduced code theory and the common RS codec algorithm, the implementation of RS encoder, then detailedly analyse the decoder realization of BM algorithm and ME algorithm, then bring forward implementation and improvement of a pipeline structure errors and erasures correcting RS decoder on ME algorithm, compromise the decoder complexity and delay to reduce the complexity and raise the maximum operating frequency. Finite-field multipliers optimize codec circuit.
本文首先介绍了编码理论和常用的RS编译码算法，提出RS编码器实现方案，详细分析了译码器的ME算法和改进BM算法的实现，针对ME算法提出了一种流水线结构的纠删纠错RS译码器实现方案，在译码器复杂度和延时上作了折衷，降低了译码器的复杂度并提高了最高工作频率，利用有限域乘法器的特性对编译码电路进行优化。
-
Due to the smart adjustment, our decoding algorithm, on one hand can break the symmetric degeneracy, and on the other hand can feed back more useful information to the SPA decoder to help the decoder determine a valid output, thereby significantly improving the decoding ability of the decoder.
我们的反馈式策略起到了经典译码中的软判决技术的作用，不但克服了对称简并问题带来的不利影响，更重要的是还给译码器提供了更多的有效信息，从而大大提高了译码器的纠错译码能力。
- 更多网络解释与译码器相关的网络解释 [注：此内容来源于网络，仅供参考]
-
coder decoder：编码译码器
coder 编码器 | coder decoder 编码译码器 | coding 编码
-
coder decoder：编码译码器iVJ中国学习动力网
coder 编码器iVJ中国学习动力网 | coder decoder 编码译码器iVJ中国学习动力网 | coding 编码iVJ中国学习动力网
-
decipherer：译码器;译码员
decipher 译码;解释 | decipherer 译码器;译码员 | decipheringfeature 解译要素
-
decoder：译码器
一般而言,接收机主要分成两大部分,一是前端(Front-End)接收部分,主要由调谐器及解调器(Demodulator)构成;另一是后端(Back-End)译码器(Decoder)部分,负责影音解压缩处理.
-
instruction decoder：指令译码器
因为内存中的每个存储单元都有编号,称为地址,可以根据这些地址把数据取出,通过AB总线送到控制单元中,指令译码器(instruction decoder)从指令寄存器(IR--Instruction Register)中拿来指令,翻译成CPU可以执行的形式,然后决定完成该指令需要哪些必要的操作,
-
instruction decoder：(指令译码器)(指令译码器)(指令译码器)(指令译码器)
Input class (输入综合)(输入综合)(输入综合)(输入综合), 1... | Instruction decoder (指令译码器)(指令译码器)(指令译码器)(指令译码器), 2-2 | Instruction timing (指令时序)(指令时序)(指令时序)(指令时序), 2-8...
-
encoder：译码器
PCI-9221:16位多功能数据采集卡;PCI接口;16个16位高分辨率模拟输入通道;采样频率最高可达250kS/s;可程序化多功能数字I/O功能;定时器;计数器;马达译码器(Encoder);脉宽调变(PWM)输出;2个16位的静态模拟输出;支持自动校正功能.
-
supergroup translator：超群变换器,超群译码器
supergroup translating equipment 超群转换设备 | supergroup translator 超群变换器,超群译码器 | supergrown 超生长
-
deciphering machine：译码器,译码机
"decipherer ","解码器" | "deciphering machine ","译码器,译码机" | "decision ","判定,判断,决定"
-
codec signatures：编码译码器签名
codec delay 编码译码器延迟 | codec signatures 编码译码器签名 | codecdesigns 编码器/译码器设计