衬底

基本解释 (translations)

substrate  ·  underlay  ·  underlaying  ·  underlays  ·  underlayment

词组短语

supporting base

与衬底相关的网络例句 [注：此内容来源于网络，仅供参考]

The quaternary GalnAsSb can be used for the bolometer, IR radar, monitoring of the environment, trace gases and other interesting purpose for its special response wavelength. GalnAsSb infrared detectors are novel compound detectors with advantages of fast response, high sensitivity, high stability, low price, especially its character to work at room temperature.

当其晶格参数与InP衬底的晶格参数相匹配时，其覆盖波长基本不变(1.6～1.7μm)：但是匹配于InAs衬底时，覆盖波长从1.7μm变到3.4μm；而与GaSb衬底晶格匹配时AlGaAsSb、GaInAsSb四元系化合物材料可以覆盖从1.7μm至4.3μm的波段，所以GaInAsSb四元系化合物材料在红外成像、红外技术方面有重要的实用价值，同时在未来的超低损耗光纤通信中也具有潜在的应用。

Our results reveal that with the same number of cobalt atoms and the same cobalt-substrate interation stength, the melting points and pre-melting intervals of the two kinds of supported Co clusters are all in reasonable agreement with each other. With increasing the depth of supported potential, the melting points increase for the supported cluster. Similar to the case of free clusters, the linear relation between the melting point and the inverse of cluster's size cube root is also found for the two kinds of supported clusters.

结果表明：对于给定原子数目的支撑Co团簇，在衬底势强度相同时，两种衬底势下对支撑团簇熔点及预熔化区间给出了一致的描述；随衬底势强度增加，支撑团簇熔点升高，且两种衬底势所描述的支撑Co团簇也类同于自由Co团簇都表现出较好的熔点与尺寸依赖的线性关系。

This invention relates to the manufacture of a substrate, such as a package substrate or an interposer substrate, of an integrated circuit package.

本发明涉及集成电路封装的衬底诸如封装衬底或插入衬底的制造。

The current density of the un-pretreated sample attains 1.2mA/cm2,but the polished sample and polished acidly washed sample attain 3.2 and 2.75mA/cm2,respectively,at the electric field of 6.25V/μm.

在场强为6.25V/μm时，衬底未处理样品的电流密度为1.2mA/cm2，而衬底抛光的样品和衬底抛光又酸洗的样品的电流密度分别达到3.2和2.75mA/cm2。

The precision lapping technology to machine the copper substrate using semi-fixed abrasive plate was studied. The surface roughness and material removal rate as the evaluation of indicators, the influences of the different lapping parameters on the surface roughness and material removal rate were discussed and analyzed. Experimental results indicated that the copper substrate could be efficiently machined by semi-fixed abrasive plate of 800(superscript #) SiC abrasive, and the initial roughness Ra of a machined surface could be improved from 0.553μm to 0.28μm in 10min, produced an ideal rarely scratch surface. Then processed copper polished by diamonded grinding paste, it could be satisfied for the Ni-Pd-P alloy thin film growth.

主要研究半固着磨具精密研磨非晶态Ni-Pd-P合金薄膜铜片衬底，以铜片衬底的表面粗糙度和材料去除率为评价指标，探讨了研磨过程中不同的工艺参数对铜片表面粗糙度和材料去除率的影响结果表明：用800 SiC半固着磨具对铜片衬底进行研磨加工，10min后铜片表面粗糙度Ra可由0553μm减小到0.28μm，同时表面无深划痕：加工后的铜片再经金刚石研磨膏抛光可快速获得满足Ni-Pd-P合金薄膜生长用的铜片衬底表面。

On the silicon substrate an epitomical layer is made,where IC components are formed subsequently.In an CVDprocess,the silicon substrates places in a vacuum crystal tube are first heated to 1,600°C by high-frequency radio power and then H⒉Cl⒉Si and certain gaseous compounds of As or P is injected into the tube to make a deposit of several um on their surface.Ions of As or P are impurity deliberately added to the singl-crystalline silicon structure to supply electrons that transmit "negative"current in the silicon crystals,which is called n-type silicon.Bcan be added as impurity to produce p-type silicon that supplies holes for transmitting "positive"current.Whether a p--type of an n-type silicon substrate is needed depends on what type of transistors is expected to be manufactured on it:n-p-n type of p-n-p type

对硅衬底上的一个epitomical层了，而IC零件形成subsequently.in一个CVD法（化学气相depsition ）过程中，硅衬底的地方在真空晶体管均先加热至1600 ° C时，由高频率的无线电功率，并然后h ⒉氯⒉硅和某些气态的化合物，砷或P ，是注入试管，使存款的几位嗯对他们surface.ions的作为或P是杂质刻意添加到单结晶硅的结构，以供应电子传递的&负面&目前，在硅晶体，即所谓N型silicon.b ，可以增加一条，作为杂质产生的p型硅供应孔转递&积极& current.whether一个P -类型的一个n型硅衬底，是需要靠哪些类型的晶体管预计将在制造上它： NPN型的PNP型

For this reason, we have performed systematically the theoreti-cal investigations of growth mechanisms of diamond films on heterogenic sili-con substrates.

本论文以最重要的异质衬底——硅衬底为突破口，开展了异质衬底上金刚石薄膜生长机理的理论研究。

The method includes the steps of forming a peelable resin layer on a silicon substrate, forming the wiring substrate on the peelable resin layer, mounting semiconductor chips on the wiring substrate, forming semiconductor devices by sealing the plurality of semiconductor chips by a sealing resin, individualizing the semiconductor devices by dicing the semiconductor devices from the sealing resin side but leaving the silicon substrate, peeling each of the individualized semiconductor devices from the silicon substrate between the silicon substrate and the peelable resin layer, and exposing terminals on the wiring substrate by forming openings through the peelable resin layer or by removing the peelable resin layer.

该方法包括以下步骤：在硅衬底上形成可剥离树脂层；在所述可剥离树脂层上形成布线衬底；将半导体芯片安装在所述布线衬底上；通过用密封树脂密封所述多个半导体芯片来形成半导体器件；通过从密封树脂侧将这些半导体器件切分但是保留硅衬底来使这些半导体器件个体化；将每个个体化半导体器件在所述硅衬底和可剥离树脂层之间从硅衬底上剥离；并且通过形成穿过可剥离树脂层的孔或者通过除去可剥离树脂层来使布线衬底上的端子暴露。

The apparatus has a substrate support, a gas directing shield circumscribing the substrate support and a shadow ring disposed vertically above the substrate support and gas directing shield for retaining the substrate.

该装置有一种衬底支架、一种包围所述衬底支架的气体引导护罩，和一种垂直布置在所述衬底支架和气体引导护罩上方的遮蔽环，用于挡住所述衬底。

The structure consists of at least two active regions emitting light with different main wave length, each of them has its own optical waveguide limit layer, two or multiple optical spectrum with different main wave length are mixed together to produce white light; cleavage cavity surface of both sides are plated reflecting film to form photon resonant chamber, light-emitting direction is all from side, this structure is suitable for LED with GaN or ZeSe base or other materials, the substrate is mode of sapphire, SiC or other materials.

本发明是一种直接出射白光的高亮度功率型LED芯片，其结构是：设有至少两个发射不同主波长光的有源区，每一个有源区具有各自的光波导限制层；两种或者多种主波长不同的光谱混合在一起产生白光；其两侧的解理腔面都镀有反射膜，形成光子谐振腔；光出射方向为全侧面出光，此种结构适合GaN基或ZeSe基的LED，或者其它材料的LED；其衬底是蓝宝石衬底，或SiC衬底，或者别的衬底材料。

与衬底相关的网络解释 [注：此内容来源于网络，仅供参考]

beryllia substrate：氧化铍衬底

beryllia porcelain | 氧化铍瓷 | beryllia substrate | 氧化铍衬底 | beryllia | 氧化铍

CJS CCS：零偏衬底结PN结电容

XCJC Cbe 接至内部Rb的内部 | CJS CCS 零偏衬底结PN结电容 | VJS PS 衬底结构PN结电容

flip chip on glass：玻璃衬底倒装片

flip chip on board 板衬底倒装片 | flip chip on glass 玻璃衬底倒装片 | flip chip on substrate 基片衬底倒装片

monolithic substrate：单块衬底,单片衬底

monolithic integrated circuit | 单块集成电路,单片集成电路 | monolithic substrate | 单块衬底,单片衬底 | monolithic technique | 单块技术

substrate parallelism：衬底平行度

substrate material 衬底材料 | substrate parallelism 衬底平行度 | substrate preparation 衬底预加工

substrate scriber：衬底划线器

substrate preparation 衬底预加工 | substrate scriber 衬底划线器 | substrate strength 衬底强度

active substrate：有源衬底

active satellite repeater 有源卫星转发器 | active substrate 有源衬底 | active substrate trimming 有源衬底蝶

active substrate：有源衬底KFz中国学习动力网

active satellite repeater 有源卫星转发器KFz中国学习动力网 | active substrate 有源衬底KFz中国学习动力网 | active substrate trimming 有源衬底蝶KFz中国学习动力网

felt underlining：油毡衬底

felt tightener 毛毯张紧器 | felt underlining 油毡衬底 | felt undersarking 油毡衬底

measuring methods of surface resistivity for glass substrates：玻璃衬底表面电阻率试验方法

l2108 玻璃衬底薄膜粘合性试验方法 testing methods for ... | l2109 玻璃衬底表面电阻率试验方法 measuring methods of surface resistivity for glass substrates | l2110 玻璃衬底表面润湿性测定方法 testing meth...