电蚀刻

基本解释 (translations)

electroetching  ·  electrograving

与电蚀刻相关的网络例句 [注：此内容来源于网络，仅供参考]

AC plasma is now used for etcher, which supplies much of the energy needed to support a gas reaction near the wafer surface.

电浆分为交流电浆和直流电流电浆，现在的蚀刻机台一般用交流电浆提供发生在硅片表面的气体反应所需的大部分能量。

In order to overcome the wet etching disadvantage and to minimize the additional waste chemical treatment cost, therefore the purpose of this thesis is to study the customization of the batch type plasma dry etcher for power diode process, to analysis the etching mechanism and build up the simulation model for the distribution of plasma power density that will be fitted with the measurement data.

在此前提下，本论文将以客制化的多片式电浆蚀刻机为研究主体，分析其蚀刻机制并建立电浆能量密度的分析模拟模型，并以实验数据做比对，藉此建立模型模拟数据的可信度。

This thesis described the etching characteristics of silicon nitride passivation films in the thin-film transistor structure using an enhanced capacitive-coupled high-density plasma etcher. The main parameters used in these experiments were RF source power, RF bias power, chamber pressure, SF6, O2 and He gas flow rates.

中文摘要本研究以加强型电容耦合式高密度电浆蚀刻机台来研究蚀刻氮化矽结构，实验操作参数为射频电浆源功率、射频偏压源功率、SF6、O2、He气体流量和腔体压力。

Main process gases used in the metal etcher of the semiconductor industry are chlorine and boron chloride. Process gases are ionized in the reactor chamber to form free radicals by plasma, which etches off aluminum film from the wafer surface.

半导体金属蚀刻制程主要使用氯气及氯化硼等气体，以高能电浆离子化产生自由基后使其与晶圆表面之铝反应将多余之铝蚀刻而产生沟槽。

There are three platinum catalyst micro channels which have different width ,such as 1000 m , 400m and 40m. The platinum catalyst micro channel reactor is fabricated by MEMS technology. The reactor uses the exothermic reaction of hydrogen and oxygen on the platinum catalyst plate as the heat source and the platinum thin film resistance deposited on a glass chip by face micro machining process as catalyst and temperature sensor. The channel is bonded with a cover plate etched by bulk micromachining technology to become a mico- channel reactor.

实验主要以微机电加工技术制作白金触媒微管道反应系统，利用微机电面型加工技术将白金薄膜电阻制作於基材为玻璃的晶片上，以此为反应所需的触媒及温度量测元件，并用体型加工技术蚀刻出微流道的上盖板相结合成微管道反应系统，本研究以1000μm、400μm及40μm的白金触媒微管进行测试，并利用微管道管壁上触媒表面降低反应活化能的特性来维持反应，此微反应系统利用氢气与氧气在白金触媒平板上的放热反应作为能量的来源。

This makes it possible to produce dielectric capacitor layers of any desired thickness using materials which can be selected as desired. In particular, this has the advantage that via etches can be carried out significantly more easily than in the prior art, since it is not necessary to etch through the residual dielectric capacitor layer above the metal tracks.

此系使得有可能利用可依所需而进行选择的材质来产生任何所需厚度的介电电容器层，特别的是，本发明所具有的优点是，相较于已知技术，通孔蚀刻系可以简单许多的方式加以进行，因为其不需要蚀刻穿透在该金属轨道上方的剩余介电电容器层。

Often called planar transistors, they are built on the surface of a silicon wafer by using a manufacturing process that precisely deposits and then etches away different insulating, conducting and semiconducting materials with such precision that the industry is now approaching the ability to place individual molecules.

通常被称为「平面电晶体」，运用一个将电晶体精确放置在晶片的表面，蚀刻掉不同绝缘、导体和半导体材料的制程，以此精密技术业界将能够在晶片上面放置个别分子大小的材料。

Often called planar transistors, they are built on the surface of a silicon wafer by using a manufacturing process that precisely deposits and then etches away different insulating, conducting and semiconducting materials with such precision that the industry is now approaching the ability to place individual molecules.

当今制造微处理器和记忆晶片的电晶体有数抳鹜荂C通常被称为「平面电晶体」，运用一个将电晶体精确放置在晶片的表面，蚀刻掉不同绝缘、导体和半导体材料的制程，以此精密技术业界将能够在晶片上面放置个别分子大小的材料。

The array chip takes a flexible transparent polyimide thin membrane as the base, the lower surface can form a cross comb-shaped array multimicroelectrode, the electrode group is composed of two comb-shaped microelectrode array electrodes which are mutually crossed but not contacted with the electrical structures not being connected, and the microchannel between the both internal electrodes of the electrode group serves as the service passage; the array chip is inversely buckled on the fusion pool, and the cross comb-shaped array multimicroelectrode on the array chip correspondes to the cell electric fusion pool and falls in the cell electric fusion pool.

阵列芯片以柔性透明聚酰亚胺薄膜为基底，下表面通过蚀刻形成交叉梳状阵列化微电极组，电极组由两个相互交叉、互不接触、电气结构上互不连接的梳状微电极阵列电极构成，电极组内部微电极之间的微通道为工作通道；阵列芯片倒扣于融合池上，其上的交叉梳状阵列化微电极组与细胞电融合池相对应，落于细胞电融合池中。

A process for making an electronic device which comprises applying a nonaqueous plate-resistant ink by ink jet printing to selected areas of a dielectric substrate, optionally laminated with an electrically conductive metal, exposing the plate resistant ink to actinic and/or particle beam radiation to effect polymerisation, adding one or more metal layers by electrolytic or electroless deposition, the upper layer of which is an etchresistant metal, removing the polymerised plate-resistant ink with alkali and finally removing the electrically conductive metal which are optionally directly laminated to the dielectric substrate and not protected by an upper layer of etch-resistant metal by chemical etching wherein the plate-resistant ink is substantially solvent-free and comprises: A 30 to 90 parts acrylate functional monomers free from acid groups comprising mono- or higher functionality wherein 5 to 95% by weight are mono-functional monomers; B 1 to 30 parts acrylate functional monomer containing one or more acid groups; C 0 to 20 parts polymer or prepolymer; D 0 to 20 parts radical initiator; E 0 to 5 parts colorant; F 0 to 5 parts surfactant; and where the ink has a viscosity of not greater than 30 cPs at 40 DEG C and all parts are by weight.

一种制备电子装置的方法，所述方法包括以下步骤：通过喷墨印刷在任选层压了一种或多种导电金属的介电底材的选定区域涂覆非水的阻沉积油墨，将所述阻沉积油墨暴露在光化辐射和/或微粒束辐射中以完成聚合，通过电解沉积或无电沉积增加一层或多层金属层，其中最上层的金属层为一种或多种阻蚀刻金属，用碱除去聚合的阻沉积油墨，最后通过化学蚀刻将任选直接层压在所述介电底材上并且不被一种或多种阻蚀刻金属的上层保护的导电金属除去，其中所述阻沉积油墨基本不含溶剂，并且包含以下组分：A30-90份不含酸基团的丙烯酸酯功能性单体，所述单体包括单官能或多官能单体，其中5-95％重量为单官能单体；B1-30份包含一个或多个酸基团的丙烯酸酯功能性单体；C0-20份聚合物或预聚物；D0-20份自由基引发剂；E0-5份着色剂；和F0-5份表面活性剂；其中所述油墨的粘度在40℃下不高于30cPs，并且所有的份数以重量计。

与电蚀刻相关的网络解释 [注：此内容来源于网络，仅供参考]

armed state：[自]待命状态

electric etching 电蚀刻法 | armed state [自]待命状态 | loxolophodont [动]斜脊齿型

Electroless Deposition：化学淀积

electroetching 电蚀刻 | electroless deposition 化学淀积 | electroless plating 化学淀积

electroform：电铸

electroetching 电蚀刻 | electroform 电铸 | electrogenesis 产电

electrography：电蚀刻

Electrodepotential 电极电位 | Electrography 电蚀刻 | Electrohydralicforming 电液成型

etch：蚀刻

ating)→蚀刻(Etch)→半检IQC→丝印阻焊油墨和字符油墨(SS)或贴阻焊干膜→热风整平或喷锡(HAL)→外形(Pounching)→成检(FQC)→电测试E-TEST→包装(Packaging流程中"化学镀薄铜 --> 电镀薄铜"这两道工序可用"化学镀厚铜"一道工序替代,

back spattering：反电泼(离子蚀刻)

back side reference method 背侧基准法 | back spattering 反电泼(离子蚀刻) | back stamp 背款

electroetching：电蚀刻

electroerosion machining 电腐蚀加工 | electroetching 电蚀刻 | electroless deposition 化学淀积

electrographite brush：人造石墨电刷

electrograph 电记录器 | electrographite brush 人造石墨电刷 | electrograving 电蚀刻

Electro graphy：电蚀刻

electrical rule check 电器法则查验 | Electro graphy 电蚀刻 | Electro hydralic forming 电液成型

etchant：蚀刻剂

当要在Cl2与BCl3之间选择适合的主要蚀刻剂(etchant)时,则必须根据HfOx/SiO2的选择比来做选择. 图三中显示出在BCl3化学特性中,以不同的电浆源功率下的温度函式来表示HfOx的蚀刻率. 一般来说,蚀刻率会随着电浆源功率的增加而增加.