条件指令

词组短语

conditional instruction · conditional order

与条件指令相关的网络例句 [注：此内容来源于网络，仅供参考]

The conditional execution feature in the ARM architecture requires special attention on binary translation and optimization.

由於ARM指令集架构是一个条件式执行的指令集架构，在转译的过程中需要特别处理条件式执行的指令，也因此转译器对於条件式执行亦须提供最佳化。

Assembly language, which are employed in every conditional instruction in the instruction set.

，然后讨论IA－32汇编语言中的的条件码（每一条条件指令都使用这些条件

A conditional instruction contained within an outer conditional instruction.

在外部条件指令中包含的一种条件指令。

Also, we modify UNITY compiler to support guarding basic block and simulating data-process instructions with conditional move instruction.

同时，在编译器中通过使用条件移动指令模拟数据处理类指令，使得整个基本块可以被条件执行。

The problem is that to represent a pretested loop the assembly language code must contain two jump instructions: a conditional branch instruction in the beginning (that will terminate the loop when the condition is no longer satisfied) and an unconditional jump at the end that jumps back to the beginning of the loop.

因为 为了实现预测试循环汇编语言中必须包含两个跳转指令：一个条件跳转指令用以跳转到循环开始的位置(该条件指令也起着条件不被满足时中止循环的作用)；另一个是结尾处的一个无条件转移指令以便跳转回循环起始处。

Based on a lot of experiment results, a conclusion is drawn: comparing with other factors, the performance of branch handling strategy is the key limits of processor to exploit the instruction level parallelism existed in nonscientific code, cache miss have severe effect on superscalar processor's performance when it runs scientific code. Second, in order to reduce the branch penalty and improve the performance of superscalar processor, a new branch handling strategy—a classification based hierarchical branch handling strategy, CHBHS is proposed. It first expands the traditional processor architecture to support multiple condition code, conditional execution and Mbranch instruction, as a result, compiler can reduce the number of static conditional branch when the code is generated. Then, CHBHS tries to use the best suitable mechanism to deal with different branch base on their different behavior. CHBHS can predict the target address of unconditional branch, subroutine call and conditional branch by buffering their target address in branch target buffer, a newly proposed high efficient return address stack is used to reduce the penalty of subroutine return instruction, a new Counter Register Stack is also proposed to reduce the penalty of loop-closing branch to zero, and dynamic branch predictor is incorporate with branch target buffer to predict the outcome of conditional branch.

基于上述结论，为了尽量消除转移指令对处理器开发指令级并行性能力的影响，进一步提高处理器性能，在详尽分析目前已存在的转移处理策略的特点与局限性的基础上，首次提出了一种新的转移处理策略即基于分类的层次转移处理策略CHBHS(Classification Based Hierarchical Branch Handling Strategy)，它首先通过扩展传统的体系结构，支持多条件码、条件式执行及多分支转移技术，以使编译程序在进行代码生成时可尽量少生成条件转移指令，从而减少静态条件转移指令的数目；其次，基于不同的转移指令的行为不同这一事实，提出了对不同的转移指令采用不同的机制进行处理的思想，即对无条件转移指令和函数调用指令以及条件转移指令的目标地址，采用转移目标缓冲器来预测，对于函数返回指令，采用所提出一种的高效返回地址栈来预测其目标地址，对于大多数循环控制转移指令，采用所提出的Counter Register Stack来将其所可能带来的损失减少为0，对于其他的条件转移指令采用动态预测机制来预测其方向。

The skipping of various instructions as developed by a predetermined set of programming conditions. If a conditional jump is not used, the next instructions would follow in the normal proper sequence .

根据预定的一组程序设计条件，确定各种指令的跳转，如果不使用条件转移，则将以通常顺序进入下一指令。

The skipping of various instructions as developed by a predetermine d set of programming conditions. If a conditional jump is not used, the next instructions would follow in the normal proper sequence

根据预定的一组程序设计条件，确定各种指令的跳转，如果不使用条件转移，则将以通常顺序进入下一指令。

For more elaborate branchless logic, compilers employ conditional instructions (provided that such instructions are available on the target CPU architecture).

为了更好的实现不包含条件分支的逻辑判断代码，编译器会使用条件指令(这是一种由目标CPU提供的指令)。

The process of comparing two operands in assembly language, which is a significant building block

软件中一个最基本的元素是是一串可执行的逻辑和条件指令。

与条件指令相关的网络解释 [注：此内容来源于网络，仅供参考]

conditional macro expression：条件宏表达式

conditional macro expansion | 条件宏扩展 | conditional macro expression | 条件宏表达式 | conditional order | 条件指令

conditional instability：条件不稳定

conditional inequality 条件不等式 | conditional instability 条件不稳定 | conditional instruction 条件指令

conditional instruction：条件指令

conditional implication 条件隐含 | conditional instruction 条件指令 | conditional interrupt request 条件中断请求

nested conditional instruction：巢套条件指令

巢套条件指引 nested conditional directive | 巢套条件指令 nested conditional instruction | 巢套临界区段 nested critical section

conditional jump instruction：条件转移指令, 条件跳变指令

conditional interlocking | 条件联锁 | conditional jump instruction | 条件转移指令, 条件跳变指令 | conditional jump | 条件转移, 条件跳变

conditional jump instruction：有条件跳位指令,条件跳越指令

条件跳越,条件式跳位 conditional jump | 有条件跳位指令,条件跳越指令 conditional jump instruction | 条件逻辑 conditional logic

conditional jump：条件跳越

conditional instructions 条件指令 | conditional jump 条件跳越 | conditional jump instruction 条件跳越指令

conditional statement in a macrodefinition：宏定义的条件语句

conditional statement 条件语句,条件指令 | conditional statement in a macrodefinition 宏定义的条件语句 | conditional statistic 条件统计量

conditional information content：条件信息内涵

conditional expression 条件表达式 | conditional information content 条件信息内涵 | conditional instructions 条件指令

conditional information content：条件信息内容,条件信息内涵

条件蕴含单元 conditional implication unit | 条件信息内容,条件信息内涵 conditional information content | 条件指令 conditional instruction