英语人>词典>汉英 : 无通道的 的英文翻译,例句
无通道的 的英文翻译、例句

无通道的

基本解释 (translations)
wayless

更多网络例句与无通道的相关的网络例句 [注:此内容来源于网络,仅供参考]

Through the sharpness of double channel within diskless write functions can improve diskless workstations and double transmission efficiency between the server, so as to improve the efficiency of actual use.

通过锐起无盘的双通道回写功能可以双倍提高无盘工作站与服务器之间的传输效率,从而提高实际使用的效率。

Based on the obtained the temperature, the electron density of the cloud lightning channel by combined with the method of the spectra diagnose and Saha equation.

论文摘要:用无狭缝光栅摄谱仪在西藏地区获得了云闪放电通道的光谱,在已经获得云闪放电通道温度的基础上,利用光谱诊断方法结合Saha方程得到了云闪放电通道的电子密度;将空气等离子体的输运理论应用于闪电放电通道特性的研究,首次计算了三次云闪放电通道的电导率、电子的热导率和热扩散系数。

RESULTS摘要: Under isotonic conditions, no single channel activities were observed in most patches. Hypotonic superfusioninduced cell swelling resulted in the appearance of active channel. Under symmetrical condition, the current induced by hypotonicity showed outward rectification and an unitary conductance of (38.1±2.5)pS.

结果摘要:等渗状态下,用细胞贴附式记录,多数心肌细胞膜片无通道活动,用低渗溶液灌流细胞,在细胞容积增大的同时,出现单通道电流的激活。

Hypotonic superfusioninduced cell swelling resulted in the appearance of active channel. Under symmetrical condition, the current induced by hypotonicity showed outward rectification and an unitary conductance of (38.1±2.5)pS.

结果: 等渗状态下,用细胞贴附式记录,多数心肌细胞膜片无通道活动,用低渗溶液灌流细胞,在细胞容积增大的同时,出现单通道电流的激活。

By Karhunen-Loeve expansion, the random processes of physical parameters such as the channel length and the oxide thickness with spatial correlations are transformed to a set of uncorrelated random variables.

利用卡洛展开(Karhunen-Loeve expansion)将通道长度和氧化层厚度这类具有空间相关随机过程的物理参数转换成一组无相关性的随机变数。

We also used tetrodotoxin and veratridine to elucidate the possible role of voltage-sensitive Na channel.

我们也用了TTX和无定形藜芦碱来阐明电压敏感性钠通道的可能作用。

The DOT says many airlines will offer gate passes for unticketed parents; ask for one and escort your child through security to the gate.

运输部表示,许多航空公司为无票的家长提供专门通道;您可以申请此项服务从而能护送孩子通过安检到登机口。

MAX1999EEI Pinout: 8- to 32-bit and 16- to 32-bit word packing options Programmable wait state options: 2 to 31 CCLK Digital audio interface includes six serial ports, two pre- cision clock generators, an input data port, three programmable timers and a signal routing unit Serial ports provide: Six dual data line serial ports that operate at up to 50 Mbits/s for a 200 MHz core on each data line each has a clock, frame sync, and two data lines that can be configured as either a receiver or transmitter pair Left-justified sample pair and I2S support, programmable direction for up to 24 simultaneous receive or transmit channels using two I2S compatible stereo devices per serial port TDM support for telecommunications interfaces including 128 TDM channel support for telephony interfaces such as H.100/H.110 Up to 12 TDM stream support, each with 128 channels per frame Companding selection on a per channel basis in TDM mode Input data port provides an additional input path to the DSP core configurable as either eight channels of I2S or serial data or as seven channels plus a single 20-bit wide syn- chronous parallel data acquisition port Supports receive audio channel data in I2S, left-justified sample pair, or right-justified mode Signal routing unit provides configurable and flexible connections between all DAI components, six serial ports, an input data port, two precision clock generators, three timers, 10 interrupts, six flag inputs, six flag outputs, and 20 SRU I/O pins Serial peripheral interface Master or slave serial boot through SPI Full-duplex operation Master-slave mode multimaster support Open drain outputs Programmable baud rates, clock polarities, and phases 3 Muxed Flag/IRQ lines 1 Muxed Flag/Timer expired line ROM based security features: JTAG access to memory permitted with a 64-bit key Protected memory regions that can be assigned to limit access under program control to sensitive code PLL has a wide variety of software and hardware multi- plier/divider ratios JTAG background telemetry for enhanced emulation features IEEE 1149.1 JTAG standard test access port and on-chip emulation Dual voltage: 3.3 V I/O, 1.2 V core Available in 136-ball BGA and 144-lead LQFP packages Lead free packages are also available

MAX1999EEI引脚说明: 8 - 32位和16 - 32位字包装选择可编程等待状态的选择:2至31个CCLK数字音频接口包括6个串行端口,两个前643时钟发生器,输入数据端口, 3可编程定时器和一个信号路由单元串行端口提供:六双串口数据线,在高达50 Mbps的操作/为200兆赫的每个数据行每个人都有一个时钟,帧同步的核心秒,和两个数据可以作为任何一个接收器或发射器对左对齐和I2S配对样本的支持下,最多可同时接收或传送24个频道,每使用两个系列的I2S兼容立体声设备配置可编程方向线;港口的TDM通信接口,包括支持128个电话接口的TDM的渠道,如H.100/H.110支持多达12个的TDM流的支持下,每帧128个频道每个压缩扩展每通道的基础上选择在TDM模式输入数据端口提供了一个额外的输入路径的DSP核心配置为I2S或串行数据或7加一个20位宽的SYN -异步的并行数据采集接口通道或8通道;支持接收通道I2S音频数据,左对齐样本对,或右对齐模式信号路由单元组件之间提供所有戴配置和灵活的连接,6个串行端口,一个输入数据端口,两个精密时钟发生器,3个定时器,10个中断,六旗投入,产出6个旗,20曼谷南南区域股的I / O管脚串行外设接口的硕士或奴隶通过SPI串行启动全双工运作主从模式多主机支持开漏输出可编程波特率,时钟极性和第三期合并调制旗/ IRQ线路1合并调制旗/定时器过期线光盘的防伪特征:JTAG的访问与64位受保护的关键允许内存内存可分配给程序访问控制的限制下对敏感地区有一个代码锁相环/遥测分比率为背景的JTAG仿真功能增强的IEEE 1149.1 JTAG标准测试访问端口的软件和硬件多钳各种各样和片上仿真双电压:3.3六/输出,可在1.2 V核心136球BGA封装和144引脚LQFP封装无铅封装,也可

TDA4864 Pinout: 8- to 32-bit and 16- to 32-bit word packing options Programmable wait state options: 2 to 31 CCLK Digital audio interface includes six serial ports, two pre- cision clock generators, an input data port, three programmable timers and a signal routing unit Serial ports provide: Six dual data line serial ports that operate at up to 50 Mbits/s for a 200 MHz core on each data line each has a clock, frame sync, and two data lines that can be configured as either a receiver or transmitter pair Left-justified sample pair and I2S support, programmable direction for up to 24 simultaneous receive or transmit channels using two I2S compatible stereo devices per serial port TDM support for telecommunications interfaces including 128 TDM channel support for telephony interfaces such as H.100/H.110 Up to 12 TDM stream support, each with 128 channels per frame Companding selection on a per channel basis in TDM mode Input data port provides an additional input path to the DSP core configurable as either eight channels of I2S or serial data or as seven channels plus a single 20-bit wide syn- chronous parallel data acquisition port Supports receive audio channel data in I2S, left-justified sample pair, or right-justified mode Signal routing unit provides configurable and flexible connections between all DAI components, six serial ports, an input data port, two precision clock generators, three timers, 10 interrupts, six flag inputs, six flag outputs, and 20 SRU I/O pins Serial peripheral interface Master or slave serial boot through SPI Full-duplex operation Master-slave mode multimaster support Open drain outputs Programmable baud rates, clock polarities, and phases 3 Muxed Flag/IRQ lines 1 Muxed Flag/Timer expired line ROM based security features: JTAG access to memory permitted with a 64-bit key Protected memory regions that can be assigned to limit access under program control to sensitive code PLL has a wide variety of software and hardware multi- plier/divider ratios JTAG background telemetry for enhanced emulation features IEEE 1149.1 JTAG standard test access port and on-chip emulation Dual voltage: 3.3 V I/O, 1.2 V core Available in 136-ball BGA and 144-lead LQFP packages Lead free packages are also available

TDA4864引脚说明: 8 - 32位和16 - 32位字包装选择可编程等待状态的选择:2至31个CCLK数字音频接口包括6个串行端口,两个前643时钟发生器,输入数据端口, 3可编程定时器和一个信号路由单元串行端口提供:六双串口数据线,在高达50 Mbps的操作/为200兆赫的每个数据行每个人都有一个时钟,帧同步的核心秒,和两个数据可以作为任何一个接收器或发射器对左对齐和I2S样本对支持,最多可同时接收或传送24个频道,每使用两个系列的I2S兼容立体声设备配置可编程方向线;港口的TDM通信接口,包括支持128个电话接口的TDM的渠道,如H.100/H.110支持多达12个的TDM流的支持下,每帧128个频道每个压缩扩展每通道的基础上选择在TDM模式输入数据端口提供了一个额外的输入路径的DSP核心配置为I2S或串行数据或7加一个20位宽的SYN -异步的并行数据采集接口通道或8通道;支持接收通道I2S音频数据,左对齐样本对,或右对齐模式信号路由单元组件之间提供所有戴配置和灵活的连接,6个串行端口,一个输入数据端口,两个精密时钟发生器,3个定时器,10个中断,六旗投入,产出6个旗,20曼谷南南区域股的I / O管脚串行外设接口的硕士或奴隶通过SPI串行启动全双工运作主从模式多主机支持开漏输出可编程波特率,时钟极性和第三期合并调制旗/ IRQ线路1合并调制旗/定时器过期线光盘的防伪特征:JTAG的访问与64位受保护的关键允许内存内存可分配给程序访问控制的限制下对敏感地区有一个代码锁相环/分比率背景遥测的JTAG仿真功能增强的IEEE 1149.1 JTAG标准测试访问端口软件和硬件多钳各种各样和片上仿真双电压:3.3六/输出,可在1.2 V核心136球BGA封装和144引脚LQFP封装无铅封装,也可

The two shafts are unusual because no other pyramid has similar passageways and no one is sure of their purpose.

这两条狭长的通道非同寻常,因为其它任何金字塔均无类似的通道,也无人确知修建它们的意图。

更多网络解释与无通道的相关的网络解释 [注:此内容来源于网络,仅供参考]

abode:住所

阅读,即此住所(abode),它简单,其简单性来自那个轻盈、透明的"是","是"就是这个住所. 即使它要求读者进入无空气无大地一切对它隐藏的地域(zone),即使,在这些风暴环绕的通道之外,阅读看起来是对公开暴力的某种参与--而这种暴力,

abyss:无底深渊

无底深渊,(Abyss)这里是混乱邪恶的终极位面,拥有无穷无尽、令人窒息的恐怖. 最著名的两个通向无底深渊的入口是冥河,以及位于外域的瘟疫号声镇(Plague-Mort)中的一座门. 这两条通道都可以抵达无底深渊的最顶层,万渊平原.

alley:小巷

一般市区有黄线的主干或次主干道在无特殊情况下可开50公里/小时左右(误差控制在5公里以内,和平时路上开车有很大差别),无黄线的小路一般时速在40左右,个别路面太差或路太窄的小路还要进一步减速,小巷(ALLEY)和停车场的通道(DRIVEWAY)时速20左右,

chaperon resistor:查佩龙电阻器(一种低残余电抗的电阻器)

通道频宽变化 channel-width variation | 无秩序行为 chaotic behavior | 查佩龙电阻器(一种低残余电抗的电阻器) chaperon resistor

Dead Time:无感时间

新元件中的12位元计时器包含四个独立的PWM(脉宽调变)输出通道以及可编程无感时间(Dead Time)产生器,很适合在照明与马达控制等PWM讯号不允许重叠的应用中用於桥驱动模式.

gulf:海湾地区

20世纪60年代晚期,当英国从海湾地区(Gulf)撤出的时候,美国并未做好充分接管的准备. 华盛顿(Washington)当局只是为确保石油通道的畅通和防御苏联入侵采取了相应措施,除此以外并无其它政策.

Runner less:无浇口的

浇注通道runner | 无浇口的runner less | 工厂plant

Rectangular:矩形的

细胞单元可以是矩形的(rectangular),也可以是星形的(radial). 直方图通道是平均分布在0-1800(无向)或0-3600(有向)范围内. 作者发现,采用无向的梯度和9个直方图通道,能在行人检测试验中取得最佳的效果.

high endothelial venule:高内皮微静脉

1、弥散淋巴组织(diffuse lymphoid tissue)无明确的界限,组织中除有一般的毛细淋巴管外,还常有毛细敌国管后微静脉,因内皮细胞吴柱状,又称高内皮微静脉(high endothelial venule),是淋巴细胞从血液进入淋巴组织的重要通道,抗原刺激可使弥散淋巴组织扩大,

A Passage to India EM Forster:印度之电磁通道福斯特

36. 36. Jude the Obscure Thomas Hardy无... | 47. 47. A Passage to India EM Forster印度之电磁通道福斯特 | The great novel of the British Raj, it remains a brilliant study of empire.在英国统治的伟大的小...