数据输入总线

词组短语

data input bus · data-in bus

与数据输入总线相关的网络例句 [注：此内容来源于网络，仅供参考]

XC68HC11F1FN Pinout:(1) Power saving driver (2) Built in DA converter accepting 6-bit digital input (for 262,144 colors)(3) Choice of 360 and 324 drive outputs (4) Input data bus at pixel level (5) Choice of output data format: gray scale or binary (6) Eleven reference voltage inputs for producing 10 segment gamma adjustment graph.

XC68HC11F1FN引脚说明：（1）省电驱动程序（2）内置DA转换器接受6位数字输入（为262，144色）（3）选择360和324驱动器输出（4）输入的像素数据总线一级（5）输出数据格式选择：灰阶或二进制（6）11参考生产10段伽玛调整图形电压输入。

Ethernet data stream with HTML format and DVB-C data stream with MPEG2 format is inputted in form of ASI and SPI, and send it into FIFO via 74F675A. 5416 packs and encrypts and transfers to DVB-C and Ethernet by time diplex mode. Thereby, data bus access is realized.

HTML格式以太网数据流和MPEG2格式DVB-C数据流以ASI和SPI形式输入，经74F675A串并转换进入FIFO.5416进行打包和加密并以时分复用方式传输DVB-C和以太网数据，实现数据总线访问。

Think of a server's I/O bus as a highway for carrying data between a server's CPU and various peripherals.

设想一下把服务器的输入/输出总线当作在服务器 cpu和各种外设之间运送数据的高速公路。

C Supports both Firmware Hub and LPC Memory Read and Write Cycles Auto-detection of FWH and LPC Memory Cycles C Can Be Used as FWH for Intel 8xx, E7xxx, and E8xxx Series Chipsets C Can Be Used as LPC Flash for Non-Intel Chipsets Flexible, Optimized Sectoring for BIOS Applications C 16-Kbyte Top Boot Sector, Two 8-Kbyte Sectors, One 32-Kbyte Sector, Three 64-Kbyte Sectors C Or Memory Array Can Be Divided Into Four Uniform 64-Kbyte Sectors for Erasing Two Configurable Interfaces C FWH/LPC Interface for In-System Operation C Address/Address Multiplexed Interface for Programming during Manufacturing FWH/LPC Interface C Operates with the 33 MHz PCI Bus Clock C 5-signal Communication Interface Supporting Byte Reads and Writes C Two Hardware Write Protect Pins: TBL for Top Boot Sector and WP for All Other Sectors C Five General-purpose Input Pins for System Design Flexibility C Identification Pins for Multiple Device Selection C Sector Locking Registers for Individual Sector Read and Write Protection A/A Mux Interface C 11-pin Multiplexed Address and 8-pin Data Interface C Facilitates Fast In-System or Out-of-System Programming Single Voltage Operation C 3.0V to 3.6V Supply Voltage for Read and Write Operations Industry-Standard Package Options C 32-lead PLCC C 40-lead TSOP

0第0页，本页显示记录0-0，共0条记录分0页显示C支持两种固件中心和LPC内存读取和写入周期自动的FWH和LPC的记忆圈C检测可以用于英特尔8xx系列，E7xxx，E8xxx系列芯片组和C可以用作FWH与至于非英特尔芯片组的BIOS应用柔性优化扇区开放16字节热门引导扇区，两个8 - Kbyte的，一个32字节部门，3个64 - Kbyte的C或存储阵列，线性预测编码闪光可分为四个统一为两个可配置的接口擦除的FWH / LPC接口为64 - Kbyte的行业，系统运行C地址/地址多路复用在制造过程中用于编程接口的FWH /线性预测编码界面C与33 MHz的PCI总线时钟 5信号通信接口进行操作，支持字节读取和写入引导扇区的顶部和WP C两硬件写保护引脚：任务型为所有其他部门 5个通用输入的系统设计的灵活性识别的多种设备选型部门登记销锁定为个别部门读取和写保护的A /阿复用界面C 11引脚复用引脚地址和8引脚的数据界面C促进快速系统内或外的系统编程的单电压3.0V至3.6V的操作供应的读取和写入操作业界标准的封装选项电压 32 -引脚PLCC 40引脚的TSOP

Big-Endian ConfigurationA signed byte load expects data on data bus inputs 31 through to 24 if the supplied address is on aword boundary, on data bus inputs 23 through to 16 if it is a word address plus one byte, and so on.

大尾段配置阿签署字节负载预计在31日的数据总线输入数据，如果通过向24所提供的地址上的字的边界，数据总线投入23日至16如果它是一个字地址加上一个字节，依此类推。

Pinout: C High-performance 32-bit RISC Architecture C High-density 16-bit Instruction Set C Leader in MIPS/Watt C Little-endian C Embedded ICE (In-circuit Emulation) 8-, 16- and 32-bit Read and Write Support 256K Bytes of On-chip SRAM C 32-bit Data Bus C Single-clock Cycle Access Fully Programmable External Bus Interface C Maximum External Address Space of 64M Bytes C Up to Eight Chip Selects C Software Programmable 8/16-bit External Data Bus Eight-level Priority, Individually Maskable, Vectored Interrupt Controller C Four External Interrupts, including a High-priority, Low-latency Interrupt Request 32 Programmable I/O Lines Three-channel 16-bit Timer/Counter C Three External Clock Inputs C Two Multi-purpose I/O Pins per Channel Two USARTs C Two Dedicated Peripheral Data Controller Channels per USART Programmable Watchdog Timer Advanced Power-saving Features C CPU and Peripheral Can be Deactivated Individually Fully Static Operation: C 0 Hz to 75 MHz Internal Frequency Range at VDDCORE = 1.8V, 85C 2.7V to 3.6V I/O Operating Range 1.65V to 1.95V Core Operating Range -40C to +85C Temperature Range Available in 100-lead TQFP Package

M5L8253P-5引脚说明： C型高性能32位RISC架构C高密度以MIPS /瓦C小端C十六位指令集C领袖嵌入式冰8 - 16 -位和32位的读写支持256K的片上SRAM的 32位数据总线C单时钟周期存取字节完全可编程的外部总线接口C最大的外部地址空间的64M字节多达8个C芯片选择C软件可编程8位外部数据总线8级优先级，独立可屏蔽，向量中断控制器C四外部中断，其中包括一个高优先级，低延迟中断要求32个可编程I / O口线三通道16位定时器/计数器C三个外部时钟输入C两多用途I / O引脚每通道2个通用同步C两专用外设数据控制器通道每个USART可编程看门狗定时器先进的节能特性 CPU和外设可停用独立全静态工作中：C 0 Hz至75 MHz的频率范围内的VDDCORE = 1.8，85℃2.7V到3.6VI / O的操作1.65V到1.95V范围核心工作电压范围在- 40C至+85 C温度范围内使用的100引脚TQFP封装

There are six technical characteristics in the system. lUsing the way alike differential input to increase the ability of anti-jamming. 2Combining multiple thread with DMA to ensure real time online monitor. 3Realizing high precision measurement of rotating speed by general purpose counter and timing in A/D card.4Using TCP/IP network protocol to realize high speed data transport between upper computer and lower computer.

该监测诊断系统具有六大主要技术特点： 1、利用准差动输入，提高现场抗干扰能力； 2、将基于Windows平台的多线程技术与DMA技术结合，保障在线系统采样的实时性与多任务性； 3、采用A/D卡自带定时/计数器对机组转速进行高精度测量，实现加窗转速跟踪快速分析； 4、利用TCP/IP协议实现上下位机网络数据高速传输； 5、采用传统振动测试与RS—485总线结合对多种测试信号进行混合采集。

与数据输入总线相关的网络解释 [注：此内容来源于网络，仅供参考]

data information：数据资料,数据信息

data identifier%[]%数据标识符% | data information%[]%数据资料,数据信息% | data input bus%[]%数据输入总线%

data input bus：数据输入总线

data input 数据输入 | data input bus 数据输入总线 | data input device 数据输入装置

DIB Data Input Bus：数据输入总线

DI Dispersion-Increasing 色散增加 | DIB Data Input Bus 数据输入总线 | DIB Device Independent Bitmap 与设备无关位图

data input bus,DIB：数据输入总线

数据启动控制 data initiated control | 数据输入总线 data input bus,DIB | 数据输入办事员 data input clerk,DIC

input data bus：输入数据总线

input data 输入数据=>入力データ | input data bus 输入数据总线 | input data check 入力データチェック

db：数据总线

2、 据总线(DB data bus) 数据总线(DB)用来在CPU与存储器、输入/输出接口和其它电路之间相互传输数据状态和指令. 由于数据可以从CPU传输到内部存储器、输入、输出接口,也可反方向传输到CPU中,所以数据总线(DB)是双向传输的总线,

DIB DataInputBus：数据输入总线

DI DataInput 数据输入 | DIB DataInputBus 数据输入总线 | DIC DataInputClerk 数据输入员

dibit：二组位

dib 数据输入总线 | dibit 二组位 | dichotomizing search 对分检索二分法搜索

highway：总线

所谓时间槽分配TSA功能是指,它能把串行数据按时间槽(Time Slot)分时处理,它可和脉冲编码调制PCM(Pulse Code Modulation)总线(Highway)之间实现连接或者是在多个μPD7721x电路之间交换数据(进行数据输入/输出).

data inaccuracy：数据不精确度

data identification 数据识别 | data inaccuracy 数据不精确度 | data input bus 数据输入总线