数据封装

基本解释 (translations)

tunneling

词组短语

data encapsulation

与数据封装相关的网络例句 [注：此内容来源于网络，仅供参考]

Experimental accuracy and repetition of FBG temperature sensitivity and compensation were discussed.have selected several materials which has bigger coefficient of expansion to do packaging components, have made many temperature experiments, there have not flaws, such as aging, crackle, absciss layer, packaging materials have good temperature sensitivity and compatibility with optical fiber;have designed the simple and practical packaging components, have performed a serials of experiments about accuracy and repetition of FBG wave-length, have obtained the first step conclusion;have analyzed the result and made comparison between the result of different experiment, have summarized the best packaging effect and several rules to reduce mistskes.

本文所做的主要工作包括以下几个内容：一、选取了常见的热膨胀系数大的材料制作封装元件，经过多次一80℃到80℃反复测试，封装元件没有出现老化开裂、封装裂纹、空洞、离层等缺陷，封装材料具有良好的温敏稳定性及复用性，与光纤相容性较好；二、对光纤光栅进行简单、实用的封装处理，就封装效果的优劣性、波长测量的准确度、重复性和封装时产生的波长损失等方面进行了一系列的实验，得出了初步的结论；三、对温敏和温度补偿式封装的实验数据进行了详细的分析和对比，从数字上对温变过程中光纤光栅中心波长的改变及温变曲线进行了定量的分析，在大量实验数据分析结果的基础上，总结出哪种材料封装效果更好，以及如何有效的减小实验误差。

Language support for data size of the package refers to the object properties and operations combined to form an independent unit, its internal information is hidden to the outside world, does not allow direct access to objects outside ...

++语言支持数据封装封装是指把对象属性和操作结合在一起，构成独立的单元，它的内部信息对外界是隐蔽的，不允许外界直接存取对象的。。。

This paper proposed a method of data encapsulation under trusted computing environment.

在可信计算环境下提出了一种数据封装方法。

The key point of the thesis was system's communication. The paper offered a simple and effective communicate method which achieved data communication between computer and PLC. The paper discussed the system how to change data、transfer and rejigger parameter accurately、advert problems in communication process between computer and PLC. This method is applied and innovative. The paper described the TCP protocol and its encapsulated Winsock module and its application for data communication of remote control. User defined protocol is used for data exchanging between the client and the control server.

本文提出了一种简单有效的通信方式实现了计算机通过串口与PLC的本地数据通信，阐述在实现上位机与下位机的通信过程中，如何在上位机进行数据转换、参数正确传递和更改以及实现方法和注意的问题，该方法具有一定的实用性和创新性；基于TCP协议，使用封装组件Winsock进行实时控制的数据交换是远程控制的核心任务，对此文中首先探讨选用TCP协议和Winsock封装组件的理由，详细描述了如何通过Winsock组件进行数据通信以及自定义协议。

This thesis analyses the realization difficulty of security modules high-speed handling and large-scale SA entries management. To realize the high-speed handle of data plane, parallel handling and pipeline technologies are introduced to the design of security module, which realizes parallel pipeline high-speed handling structure based on FPGA and high-speed encapsulation/decapsulation of IP data packages on the data plane.

分析了安全模块进行高速处理及大容量表项管理的实现难点，针对数据平面高速处理的要求，将并行处理与流水线技术引入到安全模块的具体设计中，实现了基于FPGA的并行流水线高速处理结构，完成数据平面中对IP数据包的高速封装／解封装处理。

On the basis of the summarization of MCM-Cs main features and its assembly and packaging technologies, the paper puts stress on relatively deepgoing studies in practically advanced MCM-C assembly process technologies as gold ball wire bonding, IC chip gold ball stud bump making, IC flip chip bonding and underfilling, in high reliability MCM-C packaging process technologies as integral LTCC substrate packaging, hermetically metal sealing, and also in the basic technological process of MCM-C assembly and packaging. Later on, it presents the effectively engineering development of two high level actual module products--a high-density monolithic processor system MCM-C , a high-speed data collecting and processing system MCM-C. Lastly, it briefly introduces various common methods of quality inspection and reliability test of MCM-C assembly and packaging in engineering practice.

论文在综述MCM-C的主要特点及其组装封装技术的基础上，重点对金丝球引线键合、IC芯片金球凸点制作、IC芯片倒装焊与下填充等实用先进MCM-C组装工艺技术和LTCC基板与外壳及PGA引线的一体化封装、气密性金属封装等高可靠MCM-C封装工艺技术以及MCM-C组装封装基本工艺流程展开了较深入的研究，有效完成了高密度单片机系统MCM-C和高速数据采集控制系统MCM-C等两种高水平实际产品的工程化研制工作，扼要介绍了工程实践中MCM-C组装封装工艺常用的质量检验方法和可靠性试验方法。

It also described the basic technology of the RF system's packaging and a System-In-Packagemodule of RF system with LNA, PPA, filter and antenna switch.

对高速数据处理和高密度封装技术的特点及对射频系统封装的特殊要求进行论述，介绍了射频系统封装的基本技术和一种包含LAN、PPA、滤波器、天线开关等的射频系统级封装组件。

MAX1999EEI Pinout: 8- to 32-bit and 16- to 32-bit word packing options Programmable wait state options: 2 to 31 CCLK Digital audio interface includes six serial ports, two pre- cision clock generators, an input data port, three programmable timers and a signal routing unit Serial ports provide: Six dual data line serial ports that operate at up to 50 Mbits/s for a 200 MHz core on each data line each has a clock, frame sync, and two data lines that can be configured as either a receiver or transmitter pair Left-justified sample pair and I2S support, programmable direction for up to 24 simultaneous receive or transmit channels using two I2S compatible stereo devices per serial port TDM support for telecommunications interfaces including 128 TDM channel support for telephony interfaces such as H.100/H.110 Up to 12 TDM stream support, each with 128 channels per frame Companding selection on a per channel basis in TDM mode Input data port provides an additional input path to the DSP core configurable as either eight channels of I2S or serial data or as seven channels plus a single 20-bit wide syn- chronous parallel data acquisition port Supports receive audio channel data in I2S, left-justified sample pair, or right-justified mode Signal routing unit provides configurable and flexible connections between all DAI components, six serial ports, an input data port, two precision clock generators, three timers, 10 interrupts, six flag inputs, six flag outputs, and 20 SRU I/O pins Serial peripheral interface Master or slave serial boot through SPI Full-duplex operation Master-slave mode multimaster support Open drain outputs Programmable baud rates, clock polarities, and phases 3 Muxed Flag/IRQ lines 1 Muxed Flag/Timer expired line ROM based security features: JTAG access to memory permitted with a 64-bit key Protected memory regions that can be assigned to limit access under program control to sensitive code PLL has a wide variety of software and hardware multi- plier/divider ratios JTAG background telemetry for enhanced emulation features IEEE 1149.1 JTAG standard test access port and on-chip emulation Dual voltage: 3.3 V I/O, 1.2 V core Available in 136-ball BGA and 144-lead LQFP packages Lead free packages are also available

MAX1999EEI引脚说明： 8 - 32位和16 - 32位字包装选择可编程等待状态的选择：2至31个CCLK数字音频接口包括6个串行端口，两个前643时钟发生器，输入数据端口， 3可编程定时器和一个信号路由单元串行端口提供：六双串口数据线，在高达50 Mbps的操作/为200兆赫的每个数据行每个人都有一个时钟，帧同步的核心秒，和两个数据可以作为任何一个接收器或发射器对左对齐和I2S配对样本的支持下，最多可同时接收或传送24个频道，每使用两个系列的I2S兼容立体声设备配置可编程方向线；港口的TDM通信接口，包括支持128个电话接口的TDM的渠道，如H.100/H.110支持多达12个的TDM流的支持下，每帧128个频道每个压缩扩展每通道的基础上选择在TDM模式输入数据端口提供了一个额外的输入路径的DSP核心配置为I2S或串行数据或7加一个20位宽的SYN -异步的并行数据采集接口通道或8通道；支持接收通道I2S音频数据，左对齐样本对，或右对齐模式信号路由单元组件之间提供所有戴配置和灵活的连接，6个串行端口，一个输入数据端口，两个精密时钟发生器，3个定时器，10个中断，六旗投入，产出6个旗，20曼谷南南区域股的I / O管脚串行外设接口的硕士或奴隶通过SPI串行启动全双工运作主从模式多主机支持开漏输出可编程波特率，时钟极性和第三期合并调制旗/ IRQ线路1合并调制旗/定时器过期线光盘的防伪特征：JTAG的访问与64位受保护的关键允许内存内存可分配给程序访问控制的限制下对敏感地区有一个代码锁相环/遥测分比率为背景的JTAG仿真功能增强的IEEE 1149.1 JTAG标准测试访问端口的软件和硬件多钳各种各样和片上仿真双电压：3.3六/输出，可在1.2 V核心136球BGA封装和144引脚LQFP封装无铅封装，也可

TDA4864 Pinout: 8- to 32-bit and 16- to 32-bit word packing options Programmable wait state options: 2 to 31 CCLK Digital audio interface includes six serial ports, two pre- cision clock generators, an input data port, three programmable timers and a signal routing unit Serial ports provide: Six dual data line serial ports that operate at up to 50 Mbits/s for a 200 MHz core on each data line each has a clock, frame sync, and two data lines that can be configured as either a receiver or transmitter pair Left-justified sample pair and I2S support, programmable direction for up to 24 simultaneous receive or transmit channels using two I2S compatible stereo devices per serial port TDM support for telecommunications interfaces including 128 TDM channel support for telephony interfaces such as H.100/H.110 Up to 12 TDM stream support, each with 128 channels per frame Companding selection on a per channel basis in TDM mode Input data port provides an additional input path to the DSP core configurable as either eight channels of I2S or serial data or as seven channels plus a single 20-bit wide syn- chronous parallel data acquisition port Supports receive audio channel data in I2S, left-justified sample pair, or right-justified mode Signal routing unit provides configurable and flexible connections between all DAI components, six serial ports, an input data port, two precision clock generators, three timers, 10 interrupts, six flag inputs, six flag outputs, and 20 SRU I/O pins Serial peripheral interface Master or slave serial boot through SPI Full-duplex operation Master-slave mode multimaster support Open drain outputs Programmable baud rates, clock polarities, and phases 3 Muxed Flag/IRQ lines 1 Muxed Flag/Timer expired line ROM based security features: JTAG access to memory permitted with a 64-bit key Protected memory regions that can be assigned to limit access under program control to sensitive code PLL has a wide variety of software and hardware multi- plier/divider ratios JTAG background telemetry for enhanced emulation features IEEE 1149.1 JTAG standard test access port and on-chip emulation Dual voltage: 3.3 V I/O, 1.2 V core Available in 136-ball BGA and 144-lead LQFP packages Lead free packages are also available

TDA4864引脚说明： 8 - 32位和16 - 32位字包装选择可编程等待状态的选择：2至31个CCLK数字音频接口包括6个串行端口，两个前643时钟发生器，输入数据端口， 3可编程定时器和一个信号路由单元串行端口提供：六双串口数据线，在高达50 Mbps的操作/为200兆赫的每个数据行每个人都有一个时钟，帧同步的核心秒，和两个数据可以作为任何一个接收器或发射器对左对齐和I2S样本对支持，最多可同时接收或传送24个频道，每使用两个系列的I2S兼容立体声设备配置可编程方向线；港口的TDM通信接口，包括支持128个电话接口的TDM的渠道，如H.100/H.110支持多达12个的TDM流的支持下，每帧128个频道每个压缩扩展每通道的基础上选择在TDM模式输入数据端口提供了一个额外的输入路径的DSP核心配置为I2S或串行数据或7加一个20位宽的SYN -异步的并行数据采集接口通道或8通道；支持接收通道I2S音频数据，左对齐样本对，或右对齐模式信号路由单元组件之间提供所有戴配置和灵活的连接，6个串行端口，一个输入数据端口，两个精密时钟发生器，3个定时器，10个中断，六旗投入，产出6个旗，20曼谷南南区域股的I / O管脚串行外设接口的硕士或奴隶通过SPI串行启动全双工运作主从模式多主机支持开漏输出可编程波特率，时钟极性和第三期合并调制旗/ IRQ线路1合并调制旗/定时器过期线光盘的防伪特征：JTAG的访问与64位受保护的关键允许内存内存可分配给程序访问控制的限制下对敏感地区有一个代码锁相环/分比率背景遥测的JTAG仿真功能增强的IEEE 1149.1 JTAG标准测试访问端口软件和硬件多钳各种各样和片上仿真双电压：3.3六/输出，可在1.2 V核心136球BGA封装和144引脚LQFP封装无铅封装，也可

A method for retransmitting data in overlay route network include forming overlay route network by laying overlay network node in existing bottom layer network for providing totally transparent overlay route and data retransmission service between user hosts being switched in, packaging and retransmitting as well as unpackaging user IP packet in data retransmission course then sending it to destination host for raising end to end transmission performance.

覆盖路由网络中数据转发的方法属于覆盖网络中的路由和转发技术领域，其特征在于：通过在现有底层网络中部署覆盖网络路由节点形成覆盖路由网络，为接入的用户主机之间提供完全透明的覆盖路由和数据转发服务，在数据转发过程中，用户的IP分组被封装、转发、解封装，最终发送到目的主机，实验表明在较小规模的覆盖路由网络的全连接拓扑里，同时使用跳数受限机制寻找到的路由路径会比Internet路由性能更高，而且底层网络出现故障时，覆盖路由网络能迅速绕过故障区域，从而提高了端到端的传输性能。

与数据封装相关的网络解释 [注：此内容来源于网络，仅供参考]

data-driven attack：(数据驱动攻击)依靠隐藏或者封装数据进行的攻击,那些数据可不被察觉

distributed file system 分布式文件系... | data-driven attack(数据驱动攻击)依靠隐藏或者封装数据进行的攻击,那些数据可不被察觉 | DNS spoofing(域名服务器电子欺骗)攻击者用来损害域名服务器的方法,可通过欺骗DN...

data-driven attack：(数据驱动攻击)依*隐藏或者封装数据进行的攻击,那些数据可不被察觉

distributed file system 分布式文件系... | data-driven attack(数据驱动攻击)依*隐藏或者封装数据进行的攻击,那些数据可不被察觉 | DNS spoofing(域名服务器电子欺骗)攻击者用来损害域名服务器的方法,可通过欺骗DNS...

data-driven attack：(数据驱动攻击)依靠隐藏或者封装数据进行的攻击,那些数据可不被察觉的通过防火墙

distributed file system 分布式文... | data-driven attack(数据驱动攻击)依靠隐藏或者封装数据进行的攻击,那些数据可不被察觉的通过防火墙. | DNS spoofing(域名服务器电子欺骗)攻击者用来损害域名服务器的方法,可...

datagram：数据报文

在该层数据被封装成包(packet)或数据报文(datagram). IP、IPX等通信协议就是在此层定义的,网络层寻址能力比数据链路层更强,通过RIP、OSPF等路由协议,不管两个系统是否直接相连,网络层使它们能够相互寻址. 工作在该层的最常见设备是路由器.

EDD EnvelopeDelayDistortion：封装延迟变形

EDD ElectronicDataDisplay 电子数据显示 | EDD EnvelopeDelayDistortion 封装延迟变形 | EDD EngineeringDesignData 工程设计数据

Encapsulate Collection：封装集合

Encapsulate Field 封装字段 | Encapsulate Collection 封装集合 | Replace Record with Data Class 用数据类代替记录

Encapsulate Collection：(封装群集)

8.10 Encapsulate Field(封装值域) | 8.11 Encapsulate Collection(封装群集) | 8.12 Replace Record with Data Class(以数据类取代记录)

encapsulation：封装 封装

面向对象编程的三个原则: 封装 封装(Encapsulation)是将代码及其所处理的数据绑定在一起的一种编程机制,该机制保证了程序和数据都不受外部干扰解不被误用.

GRE：通用路由选择封装

通过公共IP网在各个分支机构和公司总部之间建立基于标准VPN隧道的连接,隧道协议通常采用二层隧道协议(L2TP)、点到点隧道协议(PPTP)、IPsec、IP in IP和通用路由选择封装(GRE)等,并且利用各种加密技术和网络地址转换(NAT)技术来保障数据传输的安全;

packet Internet Groper：互联网数据包探索

packed IP address 封装的 IP 地址 | packet Internet Groper 互联网数据包探索 (PING) | packet intergration 数据包集成