- 更多网络例句与并行化相关的网络例句 [注:此内容来源于网络,仅供参考]
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Automatic dataand computation partitioning are of great challenge in parallelizing compiler s.
数据和计算分解是并行化的基础,对应的数据分布和计算划分是并行化编译的重要组成部分。
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The elevations add a Z value to the grounds X and Y horizontal coordinates. However, it is always more difficult to get DEM and normally needs more computing time to generate DEM since its complicated algorithm and huge data.
研究中 ,分别从数据并行和算法并行的角度,对 DEM生成算法并行化进行了分析,并在网络分布式机群下进行了数据处理实验,取得了较好的并行处理效果。
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The paper summerizes several general pratical new techniques, such as the analyzers of program profiles, maximum potential parallelism, array privatizability, loop parallelism; the visualizers of the statement data dependence graph, procedural callgraph, loop iteration space graph and interactive tools of array privatization and unimodular transformation; the automatic techniques of array privatization combined data dependence and coverage, the computation of parallelizing unimodular transforming matrix for mult-nested loops, enhanced unimodular transformation with array reduction recognition, non-loop level parallelism revealing technique, dynamic dataflow analysis and optimization of cross-loop local cache reuses, etc.
本文从而概括了若干具有一般性的实用新技术,如:程序计算量分析、最大潜在并行性分析、数组私有化分析、循环并行性分析等动态程序分析技术;语句数据相关图、过程调用图、循环迭代空间相关图、交互数组私有化、交互幺模变换等可视化语义交互分析变换技术等等;总结了若干自动并行化新技术,如:结合相关和覆盖的数组私有化方法、对多层嵌套循环计算幺模并行化变换矩阵的循环幺模变换方法、结合数组规约识别增强幺模变换的技术、发掘非循环级并行性的技术、动态数据流分析技术、优化利用循环间Cache数据局部性的技术等等。
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On the design of algorithms, a novel exact hierarchical delay analysis method for general circuits is proposed; based on the sensitization theorem for sequential circuits, an exact minimizing clocking method is proposed; based on Boolean process, a waveform simulation method considering interconnecting delay for logic circuit and a parallel waveform simulation method are proposed; a new method that transforms bit-level waveform polynomial to word-level polynomial model is proposed; a multiple valued synthesis algorithm based on multiple valued Boolean process and a wire-centered delay synthesis policy are proposed, in which timing planning, floorplanning, wire planning and optimal clock skew in early design are considered; a two-layers channel routing method for minimizing crosstalk under grid mode is proposed; based on the transition numbers theorems for waveform polynomial, a new method for generation of test with noise effects is proposed.
算法设计方面,提出了一种精确的通用电路层次化延时分析方法;基于时序电路的敏化定理提出时序电路最小时钟周期精确确定方法;提出基于Boolean过程论的考虑互连延迟的逻辑电路波形模拟方法,在分析了波形模拟适合并行化基础上,进一步提出一种并行波形模拟算法;提出一种将位级电路波形多项式描述转化成字级多项式描述的新方法;提出一种基于多值Boolean过程的多值电路综合算法以及一种将前期设计定时规划、前期设计的布局规划和线网结构化方法及低偏移的时钟分配等技术相结合的面向互连延时的综合策略;提出一种串绕最小化的网格模式下的双层通道布线方法;从波形多项式描述跳变数的定理出发提出了一种考虑噪声效应的测试生成新方法。
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This paper proposes a network parallel computing approach for hydromechanical problem on rectangle domain using line-relaxation method.A multigrid method with virtual nodes for the second kind boundary condition and a parallel scheme of zebra-line-relaxation multigrid technique are discussed.
提出了一个用线松弛法解决长矩形区域流场问题的网络并行方案,详细讨论了使用虚拟节点处理第2类边值条件的多重网格技术和斑马线松弛多重网格技术的并行化方法,给出了从计算方法到它的并行化的完整过程。
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The paper first discusses the programming principles of how to exploit the parallelism underlying in sequential programs with the Parallel Programming Interactive Environment, explains the designing methods of the major functions and tools integrated in the PROFPAT (the PROgramming environment for the Fortran PArallel Transformer), and demonstrates its initial application process by the practice of interactive dependence analysis, loop parallelization, array privatization and unimodular transformation.
首先,本文从理论上深入探讨了如何借助并行程序设计交互环境帮助程序员分析和利用潜藏于串行程序中的并行性的原理,详细介绍了并行程序设计环境PROFPAT中集成的主要功能和主要工具的设计实现方法,并结合交互相关性分析、交互循环并行化变换、交互数组私有化变换、交互幺模变换等程序并行化分析、变换的初步应用实践,说明了这些工具和功能的应用方法。
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This paper introduces a parallelization compiler , and in the course of its development control flow graph is visualized.
介绍了并行化编译器,在研制并行化编译器过程中,实现了程序控制流图的可视化。
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So developing an interactive parallelizing system, which combines the power of computer and user to parallelize program is an effective way to improve quality of parallelization and reduce cost of it.
交互式并行化系统通过提供一些友好的交互式功能,使用户与并行化工具紧密协作,共同完成程序并行化的任务,是解决程序并行化问题的一条有希望的途径。
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The architecture is integrated into the ready made one for CFD programs parallelizer -PARACTIVE. The result software tool is called as PARACTIVE+. Two DSMC programs from Xian Jiaotong University have already been parallelized successfully.
应用到两个DSMC方法算例的并行化中,成功生成了并行程序,在PentiumIVI.7G组成的9节点集群系统上进行了测试,4机并行效率达到85%以上,8机并行效率达到75%以上,得到用户的充分肯定。
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Retrospecting the history of the development of the parallelizing compilation technologies, it can be known that more experimental research work about the practical programs needs to be done.
由于同传统的并行化相比所需考虑的程序模块变得复杂,我们采用了人机结合的方式进行分布主存机器上的并行化研究,并且强调要充分利用在共享存储系统并行化的研究中所取得的结果。
- 更多网络解释与并行化相关的网络解释 [注:此内容来源于网络,仅供参考]
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Computer Architecture:计算机系统结构
计算机系统结构(Computer Architecture)是高等院校计算机专业的一门专业主干课程. 由于提高计算机性能的主要推动力是发展计算机体系结构的并行性,因此,在计算机科学与技术高速发展的今天,讲授和学习计算机系统结构,应以计算机并行化的概念、方法和技术为主线,
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Biochip Technology:生物芯片技术
生物芯片技术(Biochip Technology)是指通过微加工技术、微流量控制技术、微液量分配等技术将生物学研究中诸多不连续的分析过程集成于玻片、硅片等固相载体上,使这些分析过程连续化、并行化、集约化、微型化和高度信息化.
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concurrency:并行
同步化不仅造成程式缓慢, 并且丧失了 并行(concurrency)的可能. 请采用「单物件多锁」技术以允许更多并行.实践51:在单一操作(single operation)中锁定所有用到的objects 同步化某一函式, 并不一定就会使其成为「执行绪安全」的函式码.
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deserialize:串并转换/解串/并行化
desensitizer /退敏剂/减感剂/减敏剂/ | deserialize /串并转换/解串/并行化/ | deseriptor /描述符/说明摘要/解说符/
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deserializer:序列并行转换器
还原序列化 deserialization | 序列并行转换器 deserializer | 干燥剂 desiccant
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staticize:静化(串-并行数据运换)
at worst 在最坏的情况下 | staticize 静化(串-并行数据运换) | puff port 喷气口
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staticize:保存 静化 静化 静态化 静态化
statician统计员 | staticize保存 静化 静化 静态化 静态化 | staticizer串-并行转换器 串并行转换器 串并转换器
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staticizer:静化器;串并行转换器
staticimpedance 静态阻抗 | staticizer 静化器;串并行转换器 | staticlevel 静液面;静电极
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parallelization:并行化
变压器(TR)和耦合线圈(C)确保了有源滤波器(H)和线(302)之间的耦合. 滤波装置(301)的并行化(parallelization)允许使用有源滤波器(H)而无需后者被出现在线(302)上的电流或支持电压所跨过(cross). [摘要] 本发明的主要特征在于网元和方法的构成,
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automatic parallelization:自动并行化
* 132 GB/sec on-chip 核间交叉互联 (crossbar) 通信带宽我的想法是:IBM、SUN、Intel、AMD这些厂商,都应该提供一种自动并行化(automatic parallelization)的解决方案,就是说程序员不需要显式地在程序中做多线程分配处理.