- 更多网络例句与射极电流相关的网络例句 [注：此内容来源于网络，仅供参考]
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In comparison with the switches based on other polytypes of SiC, the design benefits from having fewer lattice mismatches between the SiCGe and 3C-SiC. A maximum common emitter current gain of about 890 and superb light-activation characteristics may be achievable. The performance simulation demonstrates that the device has a good I-V characteristic with a turn-on voltage knee of about 4V.
结果表明，与采用其他结晶类型的碳化硅衬底相比，SiCGe与3C-SiC间较小的晶格失配有利于提高器件性能，可使其最大共射极电流增益达到890，获得最好的光触发特性和较好的I-V特性，饱和压降大约为4V。
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It is shown that the maximum controllable current depends on the design of the current gain and emitter-shorted current.
结果表明，耦合晶体管电流放大系数及晶闸管射极短路电流的设计决定了器件的最大可关断电流。
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From our measurement data, we find that the current gain is influenced by emitter size effect.
依量测结果可知，电流增益会受到射极尺吋效应的影响。
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In the power supply circuit, series power supply and the adjustment of the series load, the load current flows through all of the adjustments, and transistors Guozainaili worse, once output overload or short circuit, the input voltage increases in the full set of adjustment an emitter, the current surge to adjust the fierce heat, if not over-current protection measures at this time, the adjustment will be burned, power Zhengliuguan also will be greatly threatened or damaged.
中文摘要：在稳压电源电路中，串联型稳压电源的调整管与负载串联，负载电流全部流经调整管，而晶体管的过载能力较差，一旦输出端过载或短路，输入电压全部加在调整管集---射极间，其电流剧增，使调整管猛烈发热，如果此时没有过流保护措施，调整管就要被烧坏，电源整流管也将受到巨大威胁或损坏。
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In contrast, if the emitter ledge is too thin, it may not effectively passivate the surface.
相对的，假如射极突出部太薄，将无法有效抑制表面复合电流。
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If the emitter ledge is too thick, current will flow through the undepleted ledge, which increases the emitter-size effect.
假如，射极突出部太厚，电流将会沿著未完全空乏的路径，横向扩散至未保护且裸露之基极表面区域，衍生非理想之大量表面复合电流。
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Voltage Source and Current Source, Thevenin Theory, Trouble Shooting, Characteristic Curve of Diode, Diode Models, Rectifier Circuits, Input Filtering Capacitor, Voltage Multiplier Circuits, Limiter and Clipper Circuits, DC Clampers and Peak-to-peak Detectors, Zener Diode, Zener Diode Rectifier, Photoelectric Devices, Collector-Emitter Junction, Transistor Characteristics of common-emitter, Base Bias, LED Dirver, Establishing a Stable Q-point, PNP Transistor Biasing, Transistor Biasing, Coupling and By-Pass Capacitors, AC Emitter Resistance, Common-Emitter Amplifier, Other Common-Emitter Amplifiers, Cascaded Common-Emitter Amplifiers, AC Load Line, Emitter Follower, Class B Push-pull Amplifiers, JFET Characteristic Curve, JFET Biasing, JFET Amplifier, VMOS Circuit, Differential Amplifier, Operational Amplifier, Non-inverting Feedback, Negative Feedback.
电子学实验( S0704)(1，1)/应用电子学实验( S0472)(1，1)电压源和电流源、戴维宁定理、故障排除、二极体特性曲线、二极体近似模型、整流电路、电容-输入型滤波器、倍压电路、限制器电路和峰值检测电路、直流定位器与峰对峰检测器、齐纳二极体、齐纳二极体整流器、光电元件、集射极接面、集极特性曲线、基极偏压、LED驱动器、建立一个稳定的工作点 Q 、 PNP 电晶体偏压、电晶体偏压、耦合及旁路电容、交流射极电阻、共射极放大器、其他 CE 放大器、串接共射极放大器、交流负载线、射极随耦器、 B 类推挽式放大器、 JFET 特性曲线、 JFET 偏压、 JFET 放大器、 VMOS 电路、差动放大器、运算放大器、非反向电压回授、负回授。
- 更多网络解释与射极电流相关的网络解释 [注：此内容来源于网络，仅供参考]
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cutoff collector current, base-open：基极开路截止集极电流
基射极短路截止集极电流 cutoff collector current, base & emitter shorted | 基极开路截止集极电流 cutoff collector current, base-open | 截止电流 cut-off current
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common emitter circuit：射极接地电路, 共射极电路
common emitter 共发射极 | Common Emitter Circuit 射极接地电路, 共射极电路 | Common Emitter Forward Current Transfer Ratio 射极接地电流放大率
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emitter current：发射极电流,射极电流
emitter 发射极,射极 | emitter current 发射极电流,射极电流 | enamelled wire 漆包线
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emitter current：发射极电流
emitter coupled logic gate 射极耦合逻辑门 | emitter current 发射极电流 | emitter diffusion 发射极扩散
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emitter current：射极电流
emitter coupled transistor logic 射极耦合晶体管逻辑 | emitter current 射极电流 | emitter follower diode logic 射极跟随器二极管逻辑
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emitter cut-off current：射极截止电流,发射极截止电流
emitter current 发射极电流 | emitter cut-off current 射极截止电流,发射极截止电流 | emitter diffusion 发射极扩散
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emitter leak current：发射极漏电流
emitter layer 发射极层 | emitter leak current 发射极漏电流 | emitter leg 射极引线
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Common Emitter Forward Current Transfer Ratio：射极接地电流放大率
Common Emitter Circuit 射极接地电路, 共射极电路 | Common Emitter Forward Current Transfer Ratio 射极接地电流放大率 | Common Mode Rejection Ratio 共模拒斥比
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ECCSL Emitter Coupled Current Steering Logic：射极耦合电流导引逻辑
ECCNP European Conference on Computer Network Protocols 计算机网络协议欧... | ECCSL Emitter Coupled Current Steering Logic 射极耦合电流导引逻辑 | ECDC Engineering Configuration Data Control 工程配置数据...
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emitter：射极
一 N 型井区被加入在 N 型扩散层之下,由于该 N 型井区具有较深的接面深度(junction depth),该 Itrig 电流会被该 N 型井区阻 挡而流入 N 型井区,这促使该寄生的双载子晶体管组件的基极(base)射极(emitter) 之间有一正的电压偏压,