中断级

词组短语

interrupt level

与中断级相关的网络例句 [注：此内容来源于网络，仅供参考]

SAK-C167CR-LM easily expands data bus width to 32 bits or more using the Master/Slave select when cascading more than one device M/S = VIH for BUSY output flag on Master M/S = VIL for BUSY input on Slave BUSY and Interrupt Flag On-chip port arbitration logic Full on-chip hardware support of semaphore signaling between ports Fully asynchronous operation from either port LVTTL-compatible, single 3.3V (0.3V) power supply Available in 84-pin PGA, 84-pin PLCC and 100-pin TQFP Industrial temperature range (-40C to +85C) is available for selected speeds

朔C167CR - LM滚动轻松扩展数据总线的宽度为32位或更多的使用主/从选择当级联多个器件M / S的=关于硕士M / S的=忙输出标志VIH VIL数值就投入繁忙和忙碌的奴隶中断标志片全部港口的仲裁逻辑芯片上的信号灯的信号港口之间的异步操作完全由硬件支持任何港口的LVTTL兼容，（为0.3V）电源可在84引脚PGA的，84引脚PLCC和单3.3V 100引脚TQFP工业温度范围（- 40C至+85 C）是选定的速度可

The device's interrupt level is one of the many items of configuration information passed as a parameter to this request.

设备的中断级别是作为参数给这个请求传递的配置信息的许多条款中的一个。

It is a global masking process for any interrupt of level higher than n.

对于比n更高的任何中断级来说，这是一个总的屏蔽处理。

The peripheral interrupt sources, and by nine interrupt level 4 interrupt system support capabilities.

这些外围设备都由9个中断源和4级中断能力的中断系统支持。

Cannot process at interrupt level.

无法在中断级进行处理。

54LS75 Pinout: Note that the level 7 interrupt is also level sensitive, and must be held until a level 7 IACK begins.

54LS75引脚说明：请注意，7级中断也是敏感程度，必须要等到一个7级亚克开始举行。

High-performance RISC CPU · Only 35 single-word instructions to learn - All single-cycle instructions except for program branches which are two-cycle · Operating speed: DC - 20 MHz clock input DC - 200 ns instruction cycle · Interrupt capability (up to 7 internal/external interrupt sources)· 8-level deep hardware stack · Direct, Indirect and Relative Addressing modes

高性能的RISC CPU·只有35单条指令学习-除了程序分支是两个周期·工作速度：直流- 20 MHz的时钟输入DC - 200 ns的所有单周期指令指令周期·中断能力（/外部中断源，高达7内部）·8级深硬件堆栈·直接，间接和相对寻址方式

Reprograms the Programmable Interrupt Controllers to mask all interrupts, except IRQ2 which is the cascading interrupt between the two PICs.

除了用在两个PCI之间的级联中断IRQ2之外，setup要把可编程中断控制器重新编码，对外界掩蔽所有中断。

Base Station type Software versionTypes of carrier frequency board adoptedTypes of combiner adoptedWhether had obtained the network license or notIndoor type or outdoor type Whether the master port is separated from the remote-port The maximum carrier frequency capacity of single cabinet The maximum supportable sector numbers of single cabinetWhether it is dual-carrier frequency board or notMust it be paired configuration if it's dual-carrier frequency board (namely, the type of single carrier frequency station could only configure the dual-carrier frequency on hardware) The maximum achievable configuration of a single station of the single cabinetReceiver sensitivity The maximum expand capacity of a single base station (the maximum number of TRX in configuration / the number of cabinets which is required)(fill in according with the three sectors) Top box transmitted power (given separately a grade one combine and a grade two combine) The maximum output power of amplifier (voice, a single logical carrier frequency) The maximum output power of amplifier (EGPRS, a single logical carrier frequency)Whether it has tower-interfaceWhether it has built-in lightning protectionWhether it support the ultra-long cover / whether it need for software support (give simple description that how hardware and software could achieve this) The supporting condition of EGSM (it should be supported including by the carrier frequency, combiner) Dual-band carrier wave (whether it supports the mixed use of 900 M/1800M in the same cabinet) The commonality of duplicate parts Whether it can built-in transmission unitThe single cabinet size (high × width × deep) Installation method Whether it can place against the wallThe basic frame full-configured weight and the supportable number of carrier frequencyThe expansion frame full-configured weight and the supportable number of carrier frequency

基站型号软件版本号采用载频板型号采用合路器型号是否已取得入网许可室内型or室外型是否是主远端分离单机柜最大载频容量单机柜最大支持的扇区数是否是双载频板如是双载频板，是否必须成对配置(即单载频站型只能硬件配置双载频)单机柜可达到的单站最大配置接收机灵敏度单基站最大扩展能力(最大配置TRX数/需机柜数)(按3扇区填写)机顶发射功率(分别给出一级合路与两级合路)功放最大输出功率功放最大输出功率(EGPRS，单个逻辑载频)有无塔放接口有无内置避雷装置是否支持超远覆盖/是否需要软件支持(简单描述软硬件如何实现)EGSM支持情况(包括载频、合路器均应支持)双频段载波（是否支持900M/1800M在同一机柜内混合使用）备件通用性是否可以内置传输单元单机柜尺寸安装方式可否靠墙放置基本架满配重量及支持载频数扩容架满配重量及支持载频数是否支持基本架与扩容架跨扇区满配功耗满配时重量供电方式机柜进出线方式合路器损耗合路能力：几合一单扇区最大支持几载频合路到一副天线/采用几个合路器单扇区载频达到需要增加一副天线时，是否支持两级合路换以不增加天线如两级合路插损为是否支持基带跳频和合成跳频每单个合路器在从低载频数向高载频数扩容时，是否还需要增加硬件可用性指标MTBFMTTR系统中断服务时间硬件是否支持EGPRS本次报价软件版本号开始支持EGPRS的软件版本号其他特点注： 1 应分别填写出来按照本次报价要求所采用的全部BTS型号和采用的合路器型号 2 列出本报价要求的全部室外型基站与高功放单元

Pinout: C High-performance 32-bit RISC Architecture C High-density 16-bit Instruction Set C Leader in MIPS/Watt C Little-endian C Embedded ICE (In-circuit Emulation) 8-, 16- and 32-bit Read and Write Support 256K Bytes of On-chip SRAM C 32-bit Data Bus C Single-clock Cycle Access Fully Programmable External Bus Interface C Maximum External Address Space of 64M Bytes C Up to Eight Chip Selects C Software Programmable 8/16-bit External Data Bus Eight-level Priority, Individually Maskable, Vectored Interrupt Controller C Four External Interrupts, including a High-priority, Low-latency Interrupt Request 32 Programmable I/O Lines Three-channel 16-bit Timer/Counter C Three External Clock Inputs C Two Multi-purpose I/O Pins per Channel Two USARTs C Two Dedicated Peripheral Data Controller Channels per USART Programmable Watchdog Timer Advanced Power-saving Features C CPU and Peripheral Can be Deactivated Individually Fully Static Operation: C 0 Hz to 75 MHz Internal Frequency Range at VDDCORE = 1.8V, 85C 2.7V to 3.6V I/O Operating Range 1.65V to 1.95V Core Operating Range -40C to +85C Temperature Range Available in 100-lead TQFP Package

M5L8253P-5引脚说明： C型高性能32位RISC架构C高密度以MIPS /瓦C小端C十六位指令集C领袖嵌入式冰8 - 16 -位和32位的读写支持256K的片上SRAM的 32位数据总线C单时钟周期存取字节完全可编程的外部总线接口C最大的外部地址空间的64M字节多达8个C芯片选择C软件可编程8位外部数据总线8级优先级，独立可屏蔽，向量中断控制器C四外部中断，其中包括一个高优先级，低延迟中断要求32个可编程I / O口线三通道16位定时器/计数器C三个外部时钟输入C两多用途I / O引脚每通道2个通用同步C两专用外设数据控制器通道每个USART可编程看门狗定时器先进的节能特性 CPU和外设可停用独立全静态工作中：C 0 Hz至75 MHz的频率范围内的VDDCORE = 1.8，85℃2.7V到3.6VI / O的操作1.65V到1.95V范围核心工作电压范围在- 40C至+85 C温度范围内使用的100引脚TQFP封装

与中断级相关的网络解释 [注：此内容来源于网络，仅供参考]

epicenter：地震震中

当地时间21日晚8点,墨西哥中部科利马州太平洋沿岸的里氏7.6级地震,震中(epicenter)位于北纬18.95度、西经104.22 度,深度为10公里. 死亡总人数目前已上升至23人. 地震造成科利马州多数地区电力供应中断,墨西哥当局已派军队前往灾区抢修线路和受损的公路.

first level interrupt handler：一级中断处理程序

first-level address 第一级地址 | first-level interrupt handler 一级中断处理程序 | first-level message 一级消息

interrupt level：中断级

interrupt latency 中断等待时间 | interrupt level 中断级 | interrupt location 中断单元

hardware interrupt level：硬件中断级

hardware interrupt facility 硬件中断设备 | hardware interrupt level 硬件中断级 | hardware language 硬件语言

priority interrupt level：优先中断级

priority interrupt expander 优先中断扩展器 | priority interrupt level 优先中断级 | priority level 优先级

interrupt latency：中断等待时间

interrupt inhibit 中断禁止 | interrupt latency 中断等待时间 | interrupt level 中断级

preempt：抢占

套[ 书上称:抢占(preempt) 优先级]和 256级中断嵌套[ 书上称:抢占(preempt) 优先级]联到EXTI的电源电压检测(PVD)中断IRQ CHANAEL 3 通道 = 255 中断优先级 RTC 实时时钟(RTC)全局中断联到EXTI的电源电压检测(PVD)中断IRQ CHANAEL 3 通道 = 0x20 中断优先级 RTC 实时时钟(RTC)全局中断是这样的,

microlevel：微级 微级水平仪

microleucocyte 小型白血球 | microlevel 微级 微级水平仪 | microlevelinterrupt 微级中断

microlevel interrupt：微级中断

微透镜 microlenses | 微级中断 microlevel interrupt | 微逻辑 micrologic

microlevel interrupt capability：微级中断能力

microlevel interrupt 微级中断 | microlevel interrupt capability 微级中断能力 | microliter syringe 微升注射器