instruction memory

instruction memory的基本解释

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指令存储器

与instruction memory相关的网络例句 [注：此内容来源于网络，仅供参考]

The idea of Autonomous Instruction Memory is to combine Top-Level Instruction Memory and Branch Target Buffer. This kind of architecture has an character of self-generating instruction address.

自主指令记忆体的设计的想法在於结合动态分支预测器和最上层的指令记忆体而拥有自行产生指令位址的特性，因而使得CPU可以不用传送指令位址给自主指令记忆体，而达到降低CPU和自主指令记忆体之间指令位址汇流排上传递资料量的目的。

The purpose of such concept is to reduce instruction address traffic between CPU and instruction memory to a minimum.

这个概的目的是要将CPU与指记忆体之间的指位址传输到最低。

It has a microcontroller peripheral devices are connected to high-speed bus connections within the connection interface and memory card connection interface, the micro-controller memory card interface, high speed bus interface to connect external devices and virtual within the integrated drive electronics interface module, and the virtual integrated drive electronics interface module includes an integrated drive electronics interface to the virtual host and virtual device side, and when the host side of the card reader connected to the memory card storage or read the instructions issued, the command will be sent to Xuni integrated Shi-driven electronic interface module, and in which the instruction to complete, while the memory card of the information on the transmission to achieve high speed Waiwei components provided within the connecting bus transfer rate, and the host will think that reader is integrated drive electronics interface devices, not just within the high-speed peripheral devices connected bus devices.

其具有微控制器分别连接有高速外围元件内连接总线连接接口及存储卡连接接口，而微控制器具有存储卡接口、高速外围元件内连接总线接口及虚拟整合式驱动电子接口模块，且虚拟整合式驱动电子接口模块包括有整合式驱动电子接口的虚拟主控端及虚拟装置端，而当主机端对读卡机所连接的存储卡下达储存或读取的指令时，该指令会传送至虚拟整合式驱动电子接口模块，并在其中将指令完成，而存储卡内的资料于传输时可达到高速外围元件内连接总线所提供的传输速率，且主控端会认为读卡机为整合式驱动电子接口装置，而非单纯的高速外围元件内连接总线装置。

与instruction memory相关的网络解释 [注：此内容来源于网络，仅供参考]

instruction decode：指令译码

[文摘]:该课题所设计的微处理器共包括两部分:整数单元和浮点单元.整数单元采用五级流水线结构分别为指令提取(Instruction Fetch)级、指令译码(Instruction Decode)级、指令执行(Execution)级、存储器访问(Memory access)级、写回(Write Back)级.论文详细阐述了流水线设计过程,

explicit matrix representation：显式矩阵表示

显性语言知识教学:explicit instruction | 显式矩阵表示:explicit matrix representation | 内隐记忆能力:Explicit memory capability

microcode memory：微码内存

微码指令集 microcode instruction set | 微码内存 microcode memory | 微码程序检查 microcode program check,MCPC