high-speed buffer

high-speed buffer的基本解释

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高速缓冲器

与high-speed buffer相关的网络例句 [注：此内容来源于网络，仅供参考]

In this paper we combined three chromatographic separation and purification technique such as affinity chromatography, ion exchanger chromatography and hydrophobic interaction chromatography to develope a new technology of stimutaneous extraction of three enzyme from pancreatin. We optimized the technology by studying the methods of purification and assured the technology as: The crude extraction from the dissolution of Pancreatin is directly absorbed on the DEAE gelose fast flow columnEquilibrating buffer is 0.01mol/L NaoAc-HoAc buffer(pH4.5; eluting buffer is 0.2～0.35mol/LNaCl in 0.01mol/LNaoAc-HoAc buffer (pH4.5), and then be eluted by two steps to acquire the peak of kallikrein.The solution which can"t be adsorbed by DEAE gelose fast flow column is adsorbed on affinity chromatographic column Equilibrating buffer is 0.01mol/LTris-HCl buffer(pH7.5, eluting buffer is 0.5mol/LNaCl in 0.01mol/Ltris-HCl buffer(pH7.5)and then be eluted by one step to acquire the peak of trypsin.The solution which can"t be adsorbed by is pretreated with 30%～80%(NH_4)_2SO_4 fractional precipitation, the deposition of the precipitation is dissolved to beabsorbed on phenyl gelose fast flow columnhydrophobic interaction chromatography condition is Equilibrating buffer is lmol/L(NH_4_2SO_4 in 0.01mol/LNaoAc-HoAc buffer(pH4.5), eluting buffer is 0～0.6mol/L(NH_4)_2SO_4 in 0.01mol/LNaoAc-HoAc buffer (pH4.5) and then be eluted by two steps to acquire the peak of chymotrypsin.

本研究考察了各种纯化方法，将离子交换层析、亲和层析和疏水层析三种分离纯化法相结合，建立了激肽释放酶、胰蛋白酶和糜蛋白酶三酶的联产工艺：胰酶用pH4.5醋酸缓冲溶液提取后，粗提液直接上DEAE-琼脂糖快胶柱吸附平衡缓冲液：0.01mol／LNaoAc-HoAc缓冲液(pH4.5，洗脱缓冲液：0.01mol／LNaoAc-HoAc缓冲液(pH4.5)含0.2～0.35mol／LNaCl分两步洗脱，收集激肽释放酶的洗脱峰；DEAE-琼脂糖快胶的未吸附液上亲和层析柱分批吸附平衡缓冲液：0.01mol／LTris-HCl缓冲液(pH7.5，洗脱液：0.5mol／LNaCl溶液，一次洗脱，收集胰蛋白酶洗脱峰；最后，亲和层析未吸附液用30％～80％硫酸铵分级盐析处理，沉淀溶解后用上苯基—琼脂糖快胶吸附平衡缓冲液：0.01mol／LNaAc-HAc缓冲液(pH4.5含1mol／L(NH_4)_2SO_4，洗脱缓冲液：0.01mol／LNaAc-HAc缓冲液(pH4.5)含0～0.6mol／L(NH_4)_2SO_4，分两步洗脱，收集糜蛋白酶的洗脱峰。

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This invention discloses a multi-queue sequence buffer management circuit and a method based on a pipeline applying a pipeline structure including: an arbitration circuit selecting one for process from read, write and distribution buffer requests, a buffer slot state module designing state of the slot requiring operation and queue numbers and assigning idle slots, a buffer slot filter module filtering the slot, a buffer slot filter module filtering the slot states not belonging to the current operation queues nor idle aligned in terms of the head pointer, a queue slot selection module computing continuous idle slot numbers from the slot pointed by the head pointer and refreshing the head pointer and selecting preparing slots, a queue slot prior queuing module refreshing the read pointer and result numbers of the current operation queues with the pointer of the first prepare slots and their numbers which can support multi-queue to share one buffer space, queues can access the buffer in overlap.

本发明公开一种基于流水线的多队列顺序化缓冲管理电路及方法，本发明电路采用流水线结构，包括：仲裁电路，从读、写、分配缓冲请求中选取一路进行处理；缓冲槽口状态设置模块，设置请求操作的槽口状态和队列号，分配空闲槽口；缓冲槽口滤除模块，滤除不属于当前操作队列且非空闲态的槽口状态，按头指针对齐；队列槽口选择模块，计算头指针指向槽口起的连续空闲槽口数并更新头指针，选出预备态的槽口；队列槽口优先排队模块，用第一个预备态槽口的指针和预备态槽口数分别更新当前操作队列的读指针和结果数；本发明可以支持多个队列共享一个缓冲空间，各类指令队列能对缓冲进行交叉访问，并对指令结果的写入读出进行顺序化管理。

与high-speed buffer相关的网络解释 [注：此内容来源于网络，仅供参考]

High-speed diesel engine：高速柴油机 High speed engine 高速发动机

High-speed auxiliary jet 高速辅助喷嘴 | High-speed diesel engine 高速柴油机 High speed engine 高速发动机 | High speed jet 高速喷射

high speed arithmetic：高速率算术

高速模拟计算器 high speed analog computer | 高速率算术 high speed arithmetic | 高速缓冲器 high speed buffer

Image Buffer: Buffer not ready：影像缓冲未准备好

191 Image Buffer: Error Bit set 影像缓冲写错误 | 192 Image Buffer: Buffer not ready 影像缓冲未准备好 | 194 Image Buffer: Error Bit remains set 影像缓冲错误